The Rambus NVRCD is the industry’s 1st JEDEC-standard persistent memory register clock driver (NVRCD) in full production for use with NVDIMM-N and emerging NVDIMM-P solutions. This chipset is our complete application-specific standard product (ASSP) solution that is reliable and cost effective. This NVRCD enables persistent memory R-DIMMs and LR-DIMMs operating at speeds up to DDR4-3200.
Register Clock Drivers (RCD) buffer and retime command, address, and clock signals from the host CPU. This reduces signal loading on the system controller by isolating the DRAM and is a common practice used in datacenter and other applications where there is an increased need for high-speed memory.
Rambus’ NVRCD is the market’s first full-production ASSP clock driver that meets or exceeds all JEDEC DDR4 performance specifications and is operational up to DDR4-3200. It also meets or exceeds all JEDEC RCD2 (rev 93) operation requirements and supports JEDEC LCOM interface which saves FPGA pins usage. This NVRCD is for NVDIMM-N products, which specifically implements non-volatile solid-state memory, such as NAND Flash, and DDR4 DRAM on the same DIMM, but also enables future emerging technologies like NVDIMM-P architectures.
Persistent memory usage on the DIMM has many use cases for hyperscale, high-performance and high-capacity data centers. These applications include: latency reduction, power reduction, metadata storage, in-memory databases, software-defined server RAID, reduced processing load during unexpected failures and more.
Driven by a confluence of megatrends, global data traffic is increasing at an exponential rate. For example, 5G networks are enabling billions of AI-powered IoT devices untethered from wired networks. Nowhere is the impact of all this growth being felt more intensely than in data centers. Indeed, hyperscale data centers have become the critical hubs of the global data network. DDR5 DRAM will enable the next generation of server systems providing the massive computing power of hyperscale and enterprise data centers. Learn about the benefits of DDR5 memory and the design considerations for implementing DDR5 DIMMs.
The demands on server performance continue to increase at a tremendous pace. New requirements from large in-memory databases that are powering today’s cloud services and advanced analytics tools are arriving just as the impact of Moore’s Law is starting to slow. One key new opportunity is for high-speed server memory interface chipsets, which enable high-speed memory performance without compromising on memory capacities. Companies looking to optimize their server memory architecture designs, and improve their overall server performance and reliability, should give serious consideration to optimized DDR4 memory interface chipsets, which enhance the performance of server memory modules.