Ideal for high-performance, high-capacity enterprise and data center systems, our DDR4 Register Clock Driver (RCD), recently acquired from Inphi, delivers industry-leading I/O performance and margin. It is a critical component for RDIMMs and, when combined with our DDR4 Data Buffer, LRDIMMs.
Demand for in-memory computing has dramatically risen with the industry’s insatiable appetite for more, faster data. Our DDR4 RCD, iDDR4RCD-GS02, recently acquired from Inphi, is made for speed, reliability and power efficiency to meet the requirements for real-time, memory-intensive applications.
The DDR4 RCD is a critical component for both classes of server memory modules, RDIMMs and LRDIMMs.
The iDDR4RCD-GS02 32-bit 1:2 registering clock driver with parity is designed for 1.2 V VDD operation.
All inputs are pseudo-differential with an external or internal voltage reference. All outputs are full swing CMOS drivers optimized to drive single terminated 25 to 50 ohms traces in DDR4/DDR4L RDIMM and LRDIMM applications. The clock outputs Yn_t and Yn_c and control net outputs QxCKEn, QxCSn and QxODTn can be driven with different strengths to compensate for different DIMM net topologies. By disabling unused outputs the power consumption can be reduced.
The iDDR4RCD-GS02 register operates from a differential clock (CK_t and CK_c). Inputs are registered at the crossing of CK_t going HIGH, and CK_c going LOW. The input signals can be either re-driven to the outputs or they can be used to access device internal control registers when certain input conditions are met.
The demands on server performance continue to increase at a tremendous pace. New requirements from large in-memory databases that are powering today’s cloud services and advanced analytics tools are arriving just as the impact of Moore’s Law is starting to slow. One key new opportunity is for high-speed server memory interface chipsets, which enable high-speed memory performance without compromising on memory capacities. Companies looking to optimize their server memory architecture designs, and improve their overall server performance and reliability, should give serious consideration to optimized DDR4 memory interface chipsets, which enhance the performance of server memory modules.
Don’t miss out on the Rambus Design Summit on October 8th!