Memory Interface Chips
DDR4 Register Clock Driver
Ideal for high-performance, high-capacity enterprise and data center systems, our DDR4 Register Clock Driver (RCD), recently acquired from Inphi, delivers industry-leading I/O performance and margin. It is a critical component for RDIMMs and, when combined with our DDR4 Data Buffer, LRDIMMs.
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Solution OverviewHow the DDR4 Register Clock Driver works
Demand for in-memory computing has dramatically risen with the industry’s insatiable appetite for more, faster data. Our DDR4 RCD, iDDR4RCD-GS02, recently acquired from Inphi, is made for speed, reliability and power efficiency to meet the requirements for real-time, memory-intensive applications.
The DDR4 RCD is a critical component for both classes of server memory modules, RDIMMs and LRDIMMs.
The iDDR4RCD-GS02 32-bit 1:2 registering clock driver with parity is designed for 1.2 V VDD operation.
All inputs are pseudo-differential with an external or internal voltage reference. All outputs are full swing CMOS drivers optimized to drive single terminated 25 to 50 ohms traces in DDR4/DDR4L RDIMM and LRDIMM applications. The clock outputs Yn_t and Yn_c and control net outputs QxCKEn, QxCSn and QxODTn can be driven with different strengths to compensate for different DIMM net topologies. By disabling unused outputs the power consumption can be reduced.
The iDDR4RCD-GS02 register operates from a differential clock (CK_t and CK_c). Inputs are registered at the crossing of CK_t going HIGH, and CK_c going LOW. The input signals can be either re-driven to the outputs or they can be used to access device internal control registers when certain input conditions are met.
Data Center Evolution: DDR5 DIMMs Advance Server Performance
Driven by a confluence of megatrends, global data traffic is increasing at an exponential rate. For example, 5G networks are enabling billions of AI-powered IoT devices untethered from wired networks. Nowhere is the impact of all this growth being felt more intensely than in data centers. Indeed, hyperscale data centers have become the critical hubs of the global data network. DDR5 DRAM will enable the next generation of server systems providing the massive computing power of hyperscale and enterprise data centers. Learn about the benefits of DDR5 memory and the design considerations for implementing DDR5 DIMMs.
Solution Offerings
- Fully compliant with the latest JEDEC DDR4RCD02 standard
- Used in both RDIMM and LRDIMM
- 2V Vdd supply
- Operational up to 2666 Mbps
- Multi-setting frequency-based power optimization
- Wide temperature range: -5° C – 125° C
- ROHS compliant
- Improved ESD/EOS beyond JEDEC requirements
- High Performance Servers
- High Performance Workstations
- High Capacity Storage Systems
- High Reliability & Telecom Systems
- DDR4 JEDEC standard RDIMM designs
- DDR4 JEDEC standard LRDIMM designs, in conjunction with the Inphi iDDR4 DB
High Speed Memory Interface Chipsets Let Server Performance Fly
The demands on server performance continue to increase at a tremendous pace. New requirements from large in-memory databases that are powering today’s cloud services and advanced analytics tools are arriving just as the impact of Moore’s Law is starting to slow. One key new opportunity is for high-speed server memory interface chipsets, which enable high-speed memory performance without compromising on memory capacities. Companies looking to optimize their server memory architecture designs, and improve their overall server performance and reliability, should give serious consideration to optimized DDR4 memory interface chipsets, which enhance the performance of server memory modules.
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