At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
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Rambus announces industry’s first fully functional DDR5 DIMM
https://hexus.net/tech/news/ram/110387-rambus-announces-industrys-first-fully-functional-ddr5-dimm/#new_tabSpecialist memory company Rambus has announced a fully functional DDR5 DIMM (dual in-line memory module) prototype. It claims to have achieved an industry first with its DIMM “capable of achieving the speeds required for the upcoming DDR5 standard”.
Rambus announces industry’s first functional silicon of server DIMM buffer chipset targeted for next-generation DDR5
https://www.cieonline.co.uk/rambus-announces-industrys-first-functional-silicon-of-server-dimm-buffer-chipset-targeted-for-next-generation-ddr5/#new_tabRambus Inc. has announced functional silicon of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype for the next-generation DDR5 memory technology. This represents a key milestone for Rambus as the industry’s first silicon-proven memory buffer chip prototype capable of achieving the speeds required for the upcoming DDR5 standard.
DDR5 Runs in Rambus’ Labs
https://www.eetimes.com/document.asp?doc_id=1332322#new_tabRambus has working silicon in its labs for DDR5, the next major interface for DRAM dual in-line memory modules (DIMMs). The register clock drivers and data buffers could help double the throughput of main memory in servers, probably starting in 2019 — and they are already sparking a debate about the future of computing.
Rambus Announces Industry’s First Functional Silicon of Server DIMM Buffer Chipset Targeted for Next-generation DDR5
https://www.rambus.com/rambus-announces-next-gen-ddr5/Provides data center architects early path to next-generation memory speeds SUNNYVALE, Calif. – Sept. 20, 2017 – Rambus Inc. (NASDAQ: RMBS) today announced functional silicon of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype for the next generation DDR5 memory technology. This represents a key milestone for Rambus and the industry’s […]
Welcome your new Silicon Valley Chapter President, Jerome Nadel of Rambus!
https://thecmoclub.com/news-item/silicon-valley-chapter-pres-jerome-nadel/?utm_campaign=C_Clubhouse%20Content&utm_content=60472193&utm_medium=social&utm_source=twitter#new_tabGet to know your Silicon Valley Chapter President: Jerome Nadel. Jerome is the Chief Marketing Officer at Rambus and has been a CMO Club Member since July 2014. He is active in Chapter Dinners, CMO Club Summits, led CMO roundtable discussions and was a 2016 CMO Awards Finalist. You can connect with Jerome here on Twitter and LinkedIn.
SiFive’s Chief Executive on Opening a Chip Design Factory
https://www.electronicdesign.com/embedded-revolution/sifive-s-chief-executive-opening-chip-design-factory#new_tabBefore he agreed to anything, Naveed Sherwani needed to make 40 phone calls. He had questions about the new RISC-V computer architecture and the company founded by its inventors, SiFive. He had been asked to run it.
Rambus and Northwest Logic Certify Interoperability of HBM2 Interface Solution for High-performance Networking and Data Center Applications
https://www.rambus.com/northwest-logic-rambus-certify-hbm2-interoperability/Integrated HBM2 PHY and Memory Controller provide validated, standards-compliant memory subsystem with superior signal integrity and reliability SUNNYVALE, Calif. – Aug. 28, 2017 – Rambus Inc. (NASDAQ: RMBS), an innovator in semiconductor and IP products, today announced validated interoperability between its HBM2 PHY and Northwest Logics’ HBM2 Memory Controller Core. The solution builds on the growing ecosystem […]
Rambus and Northwest Logic Certify Interoperability of HBM2 Interface Solution for High-performance Networking and Data Center Applications
https://www.rambus.com/rambus-and-northwest-logic-certify-interoperability-of-hbm2-interface-solution-for-high-performance-networking-and-data-center-applications/Integrated HBM2 PHY and Memory Controller provide validated, standards-compliant memory subsystem with superior signal integrity and reliability SUNNYVALE, Calif. – Aug. 23, 2017 – Rambus Inc. (NASDAQ: RMBS), an innovator in semiconductor and IP products, today announced validated interoperability between its HBM2 PHY and Northwest Logics’ HBM2 Memory Controller Core. The solution builds on the growing ecosystem […]
Rambus Reports Second Quarter 2017 Financial Results
https://www.rambus.com/second-quarter-2017-financial-results/Revenue of $94.7 million, up 24% year over year GAAP diluted net income per share of $0.02; non-GAAP diluted net income per share of $0.14 Secured customer and partnership agreements with industry leaders including: Cybertrust, Synopsys, Google and Interac Launched turn-key, secure CryptoManager™ IoT Device Management service and demonstrated with Qualcomm and STMicroelectronics SUNNYVALE, Calif. […]
Rambus Launches JEDEC-Standard DDR4 NVRCD for Emerging NVDIMM Applications
https://www.rambus.com/rambus-launches-ddr4-nvrcd/Enables high performance and reliability of data for next-generation cloud data centers SUNNYVALE, Calif. – June 19, 2017 – Rambus Inc. (NASDAQ:RMBS) today announced the industry’s first production release of a JEDEC-standard persistent memory register clock driver (NVRCD) for use with DDR4 non-volatile dual in-line memory modules (NVDIMM). Operating at data rates up to 3200 […]
