The term “memory wall” was first coined in the 1990s to describe memory bandwidth bottlenecks that were holding back CPU performance. The semiconductor industry helped address this memory wall through DRAM architecture innovations, rapidly increasing memory bus widths and data rates, and better process technologies that made faster memory and interfaces manufacturable. The torrid pace of innovation in AI processing has given rise to a similar bottleneck that has created an “AI memory wall.”
Breaking Through The Generative AI Memory Wall
Ask the Experts: DDR5 MRDIMMs
John Eble, Vice President of Product Marketing for Memory Interface Chips at Rambus, discusses the new MRDIMM (Multiplexed Registered DIMM) DDR5 memory module architecture.
Key takeaways include:
- Enhanced DDR5 Architecture
- Doubled Bandwidth
- Increased DRAM Capacity
- New Memor Interface Chips
- Future Roadmap
Quantum Safe IPsec Toolkit Product Brief
A complete IPsec implementation with Quantum Safe protections. Fast, scalable and fully compliant IPsec implementation. Used in cloud and virtual deployments, high traffic gateways, and embedded devices.
Classic IPsec Toolkit Product Brief
The IPsec Toolkit client/server software for cloud and embedded security. It provides a complete software stack to build scalable IPsec VPN gateways or robust IPsec clients.
Ask the Experts: AI at the Edge
In our latest episode of Ask the Experts, Sharad Chole, Co-founder and Chief Scientist at Expedera, shares his insights on the challenges and opportunities of deploying AI inference workloads at the edge.
Key topics include:
- The exponential growth in AI model complexity
- Overcoming challenges in edge AI: memory and bandwidth
- The road ahead for AI at the edge
PCIe 6.2 Switch Product Brief
The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the connection of one upstream port and multiple downstream ports as a fully configurable interface subsystem. It is backward compatible to PCIe 5.0.
