Engineers at ETH Zurich and the University of Bologna recently debuted the 32-bit PULPino, an open-source microprocessor based on RISC-V architecture. The PULPino – taped out as a 65nm ASIC – is now available for RTL simulation and FPGA mapping.
Blog
DEFCON organizer talks IoT security
Ted Harrington, partner at Independent Security Evaluators and organizer of the annual DEFCON hacker conference, is not at all optimistic about a secure IoT. As Harrington tells Inverse, IoT security “will get worse, potentially a lot worse, before it gets better.”
From consoles to VR
The Atari 2600 (or VCS) – which hit the nascent video game market back in 1977 – packed 128 bytes RAM and an 8-bit MOS 6507 CPU clocked at a mere 1.19 MHz. According to Wikipedia, the RAM was tasked with handling run-time data, which included the call stack and the state of the game world. There was no frame buffer.
IoT on the edge
McObject CEO Steve Graves recently noted that there is little industry discussion about data management on so-called edge nodes comprising the Internet of Things (IoT). “A vast number of edge devices will need to store, retrieve and analyze some data right where they sit, before shipping anything ‘upstream’ to gateway or server-based data aggregation points that we usually think of in connection with Big Data,” Graves explained in a blog post published in Embedded Design.
Balancing cores and memory with Smart Data Acceleration
Ed Sperling of Semiconductor Engineering recently noted that adding more cores to a processor doesn’t necessarily improve system performance. In fact, designing the wrong size or type of core may actually waste power. “This has set the stage for a couple of broad shifts in the semiconductor industry,” Sperling explained. “Memory architectures can play an important role here. Most of the current approaches use on-chip SRAM and off-chip DRAM. But different packaging options, coupled with different memory architectures, can change the formula.”
Architecting new memory for the IoT
The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D and 3D packaging, are evolving to meet the demands of a new digital age.
