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Home > Press Releases > Rambus Inc. Adopts Register Description Language And Licenses Denali’s Blueprint Software For Ip Development Process

Rambus Inc. Adopts Register Description Language And Licenses Denali’s Blueprint Software For Ip Development Process

Los Altos, California, United States – 12/15/2005
Rambus Inc. (Nasdaq:RMBS), one of the world’s premier technology licensing companies specializing in high-speed chip interfaces, today announced that it has adopted the Register Description Language (RDL) and licensed Denali’s Blueprint™ software for Rambus intellectual property (IP) development and enhanced customer support.

Rambus has also joined the RDL Alliance, a program formed and chaired by Denali. The goal of the alliance is to promote the standardized usage of RDL in the development and delivery of IP products used in system-on-chip (SoC) designs. Configuration registers modeled in RDL store key parameters that define the operation of the chips, and are required by system architects, hardware developers, and software engineers to develop end products. IP providers and system developers benefit from the alliance by having a common, consistent, computer-readable specification of these registers, which ultimately speeds architecture, design, verification, and documentation for semiconductor chip designs.

“The combination of Rambus’ high-speed interconnect expertise, plus our RDL will help customers design and develop in a common, easy-to-use process,” said Mark Gogolewski, chief technology officer at Denali Software Inc. “This is an important step for the industry as it helps bring this language to the market to support a simplified design flow.”

Rambus plans to incorporate RDL and the Blueprint software into the design process for certain Rambus products. The standardized RDL will be used to facilitate the design capture of control and status register logic. From the RDL input, the Blueprint software will generate various IP views for RTL design, simulation, documentation, software development, as well as final chip bring-up and testing. Rambus customers who choose to utilize Blueprint will have an enhanced level of flexibility for customizing and extending Rambus design views.

“Rambus’ highly integrated IP solutions focus on several steps in the customer’s chip development process,” said Prakash Bare, director and general manager of Rambus’ digital logic core products. “The adoption of the RDL methodology will provide great benefit for the many different design, documentation and verification views of the register space.”

For more information about Rambus products, visit www.rambus.com/products.

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