The days of building a moat around the castle to keep data secure were long gone before the pandemic led to a surge in remote work. With the enterprise network no longer rooted in a single place, every connection needs to be secured in line with increased server connectivity bandwidth requirements of cloud and edge computing.
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Interview: NXP CEO Kurt Sievers | Cryptographers vs. Quantum Computers | The 8088
In this episode…Kurt Sievers is the new CEO of NXP, a job he’s been groomed for … for several years. We have an exclusive interview with Sievers, who discusses where NXP is going, and how he’s going to get it there. Also, quantum computing seems to threaten the very idea of cryptography. But that’s far from a guarantee. Today on the program we talk with Helena Handschuh from Rambus, who is one of the cryptography experts helping to devise algorithms to stand up against the most powerful computers man can conceive of.
Securing the Silicon Supply Chain
I don’t know about you, but when I hear the name Rambus, I think of the company that was founded in 1990. I remember them leaping into the limelight with a fanfare of trumpets. Well, if the truth be told, it was with their 600 MHz interface technology, which addressed the memory bottleneck issues being faced by system designers of the time, but hearing their sumptuous specifications was the computer engineering equivalent of having one’s ears massaged by a magnificence of mellophones.
Dangers of Counterfeit Semi Chips
In 2019, the worldwide fake semi market was estimated at $75 billion according to Industry Week. This counterfeit chip market particularly prevalent in the government and defense industries. According to a US government report, more than 1 million counterfeit electronic components were used in 1,800 instances affecting military aircraft and missiles.
Rambus’ HBM2E Memory Controller & PHY Offer Chipmakers Cost-Effective Designs
The latest generation of high-bandwidth memory, HBM2E, is around the corner. Now that Samsung has started mass production of its HBM2E memory stacks, Rambus has unveiled its controller and PHY (physical interface) designs.
Rambus Develops HBM2E Controller & PHY: 3.2 Gbps, 1024-Bit Bus
The latest enhancements to the HBM2 standard will clearly be appreciated by developers of memory bandwidth-hungry ASICs, however in order to add support of HBM2E to their designs, they are also going to need an appropriate controller as well as physical interface. For many companies developing of such IP in-house does not make financial sense, so Rambus has designed a highly-integrated HBM2E solution for licensing.
