At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 303 Results
Northwest Logic Announces the Immediate Availability of x8 PCI Express 2.0 Solution For Xilinx Virtex-5 FXT FPGA Platform
https://www.rambus.com/northwest-logic-announces-the-immediate-availability-of-x8-pci-express-2-0-solution-for-xilinx-virtex-5-fxt-fpga-platform/The Expresso 2.0 Solution is hardware proven and PCI-SIG® Certified Beaverton, Oregon, November 20, 2008 – Northwest Logic announces the immediate availability of a high-performance, hardware-proven, x8 lane Expresso 2.0 Solution for PCI Express® 2.0 for Xilinx’s Virtex®-5 FXT FPGA platform. This solution combines Northwest Logic’s full-featured x8 Expresso 2.0 Core for PCI Express 2.0 […]
eASIC and Northwest Logic Deliver Low Cost, Silicon-Proven, 533 Mbps DDR2 SDRAM Solution
https://www.rambus.com/easic-and-northwest-logic-deliver-low-cost-silicon-proven-533-mbps-ddr2-sdram-solution/eASIC Based DDR2 SDRAM Solution Provides 60% Higher Performance than Mainstream Low-Density FPGAs Santa Clara, CA – June 30, 2008 – eASIC Corporation, a provider of zero-mask charge ASIC devices, and Northwest Logic, a provider of high-performance IP Cores, today announced the immediately availability of a silicon-proven 533 Mbps DDR2 SDRAM solution for eASIC’s low-cost […]
Rambus Showcases Silicon Verified Demo Compliant with Gen2 Revision 0.5 Specification for PCI Express
https://www.rambus.com/rambus-showcases-silicon-verified-demo-compliant-with-gen2-revision-0-5-specification-for-pci-express/Seamlessly integrated digital controller and PHY solution for next generation PC and peripheral interconnect Los Altos, California, United States – 09/25/2006 Rambus Inc. (Nasdaq: RMBS), one of the world’s premier technology licensing companies specializing in high-speed chip interfaces, today announced the availability of its Gen2 Total Solution silicon demo, a complete communications interface solution featuring an integrated […]
