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LPDDR5T/5X/5 Controller

https://www.rambus.com/interface-ip/lpddr/lpddr5-controller/

LPDDR5T / LPDDR5X / LPDDR5 Controller Contact Us The Rambus LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memory throughput at low power including mobile, automotive, Internet of Things (IoT), laptop PCs, and edge networking devices. Secure Site Login ContactProduct Briefs LPDDR5T/5X/5 Controller LPDDR4X/4 & LPDDR5T/5X/5 Combo […]

Demonstration of a CXL Interconnect on a FPGA-based design

https://www.rambus.com/demonstration-of-a-cxl-interconnect-on-a-fpga-based-design/

In this video, we demonstrate the Rambus Controller IP for CXL 2.0 and the CXL.mem protocol used to access Host-managed Device Memory, or HDM. This demonstration is performed using Intel’s Pre-Production Xeon processor as a host, connected to an FPGA board, instantiating Rambus’ CXL Controller and CXL.mem test design.

Product Selector

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Product Selector Explore our full catalog of products so you can find the right solution to fit your needs.

NextChip Win Signals Growing Momentum for Rambus Automotive Security IP

https://www.rambus.com/blogs/nextchip-win-signals-growing-momentum-for-rambus-automotive-security-ip/

Cars are packed with electronics, and in the age of ADAS (Advanced Driver Assistance Systems), those electronics are mission critical to the safe and reliable operation of the vehicle. Rambus provides a broad portfolio of security IP solutions that can protect these systems and the data coursing over in-vehicle networks. NextChip has emerged as a […]

NextChip Selects Rambus Security IP to Secure Apache6 Automotive Processor

https://www.rambus.com/nextchip-selects-rambus-security-ip-to-secure-apache6-automotive-processor/

Highlights: Rambus RT-640 Root of Trust and MACsec-IP-160 Protocol Engine to protect next-generation NextChip Apache6 SoC Rambus Root of Trust and MACsec engine enable secure boot for centralized domain/zone processors and link protection for Automated Valet Parking (AVP) and other demanding ADAS applications Rambus security solutions meet ISO 26262 ASIL-B reliability and protect mission-critical data […]

Rambus – Data. Faster. Safer.

https://www.rambus.com/rambus-data-faster-safer/

Watch this video to learn how we advance data center connectivity and solve the bottleneck between memory and processing. Whether in the cloud, at the edge or in your hand, real-time and immersive applications depend on data transfer speed and trust. Rambus products and innovations deliver the increased bandwidth, capacity and security required to usher in […]

Anti-Tamper Benefits of Encrypted Helper-Data Images for PUFs

https://go.rambus.com/anti-tamper-benefits-of-encrypted-helper-data-images-for-pufs#new_tab

PUFs are mixed-signal circuits which rely on variations unique to a specific chip to self-generate a digital “fingerprint.” Most PUFs require a “helper-data” image that is generated during the initial digitization process, also known as Enrollment. Leveraging the chip-unique transformation function of PUFs and encrypted helper data, an unclonable challenge-response mechanism can be implemented that […]

Keith Jones

https://www.rambus.com/leadership/keith-jones/

Keith Jones VP, Finance and Interim CFO Keith Jones joined Rambus in February 2018 and has served as the Interim Chief Financial Officer since November 2021, where he is responsible for the global finance organization, with responsibility for financial management, planning, tax, treasury, controls, and reporting. Previously, he served as the Chief Accounting Officer, Corporate […]

Combining Root of Trust and PUF Technology For Robust Chip Security

https://www.rambus.com/blogs/combining-root-of-trust-and-puf-technology-for-robust-chip-security/

The foundation of security for semiconductor devices is the implementation of a hardware Root of Trust (RoT) on which all secure operations of a system rely. With the growing interest in Physical Unclonable Function (PUF) technology as the source of entropy for cryptographic operations, a combined RoT and PUF solution is extremely compelling. Today, Rambus and Intrinsic ID announced the availability of integrated solutions that seamlessly bring together industry-leading RoT and PUF offerings.      Neeraj Paliwal, general manager of Security […]

[DEMO] DDR5 Server DIMM buffer chipset

https://www.rambus.com/demo-ddr5-server-dimm-buffer-chipset/

[Demo]: Discover why Rambus DDR5 Server DIMM buffer chipset is the industry’s first functional silicon targeted for next-generation DDR5. https://youtu.be/nw08IEAjcJ8Discover in this video how the Rambus DDR5 memory interface chipset helps designers harness the full advantages of DDR5 while dealing with the signal integrity challenges of higher data, CA, and clock speeds. Contact Sales

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