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Will Neuromorphic Chips Outpace AI Processors?
https://www.rambus.com/blogs/will-neuromorphic-chips-outpace-ai-processors/Add this one to your list of artificial intelligence (AI) terms — neuromorphic chips. They’re described as chips that model the human brain. That’s what Stanford University professor Kwabena Boahen and other researchers are working on, according to EE Times Rick Merritt’s recent report. The promise coming from these AI researchers is that neuromorphic chips […]
The Autobahn Lanes of HBM2 and GDDR6
https://www.rambus.com/blogs/the-autobahn-lanes-of-hbm2-and-gddr6/Narrow roads versus silicon superhighways Steven Woo, Rambus fellow and distinguished inventor, recently spoke with Ed Sperling of Semiconductor Engineering about the capabilities of HBM2 and GDDR6 memory in real-world scenarios. As Woo notes, choosing between HBM2 and GDDR6 is a complex design decision that requires an in-depth understanding of system and application requirements. For […]
Controllers Newsletter – Q2 2019
https://www.rambus.com/controllers-newsletter-q2-2019/Northwest Logic is the HBM2 Controller Market Leader Since the first demonstration in 2015, Northwest Logic’s HBM2 controllers have become market’s preferred choice: 31 customer designs and 9 test chips Silicon proven on TSMC, Samsung, Global Foundries processes Full support for HBM2, HBM2E and Low Latency HBM devices Broadcom, Rambus, eSilicon and Synopsys HBM PHY […]
What About AI Regulations?
https://www.rambus.com/blogs/what-about-ai-regulations/These days, there’s considerable talk and hoopla surrounding artificial intelligence/AI. Tech companies on a worldwide basis are talking about how their products are complying with AI requirements. And that includes Rambus with its lineup of new GDDR6 and HBM2 PHYs. These products provide SoC and system designers the right solutions to move onward with next […]
The Security Risks of Silicon Complexity: Part 2
https://www.rambus.com/blogs/the-security-risks-of-silicon-complexity-part-2/In part one of this two-part blog series, Ben Levine, Senior Director of Security Product Marketing at Rambus, and Semiconductor Engineering editor-in-chief Ed Sperling, discuss the many security challenges associated with creating increasingly complex CPUs, SoCs and embedded systems. While there isn’t a single solution to the problem, says Levine, an embedded security processor– siloed from […]
eSilicon Tapes Out 7nm Combo PHY (HBM2/HBM2E/Low Latency) Test Chip
https://www.rambus.com/esilicon_combo_phy_hbm2_hbm2e_low_latency/Chip facilitates continued support of the latest HBM technologies for eSilicon’s 2.5D FinFET ASICs SAN JOSE, Calif. — May 9, 2019 — eSilicon, a leading provider of FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today the tapeout of a 7nm test chip to provide silicon validation of its physical interface (PHY) […]
5G Eats Up More Memory
https://www.rambus.com/blogs/5g-eats-up-more-memory/5G is more memory hungry compared to previous generations, according to Gary Hilson, memory editor at EE Times. In his recent article, he pulled together an industry consensus about the types of memory that might be considered to comply with 5G demands, the pros and the cons. Hilson writes that it makes sense when you […]
Helena Handschuh’s Article: RISC-V, DARPA Advance Security
https://www.rambus.com/blogs/helena-handschuhs-article-risc-v-darpa-advance-security/Helena Handschuh wrote a recent article in EE Times stating that “with the proliferation of intelligent devices, the industry needs new robust security approaches instead of trying to fix the cracks in existing designs.” Handschuh is chair of the RISC-V Foundation’s security standing committee and a Fellow at Rambus. Titled “RISC-V, DARPA Advance Security,” the […]
The Security Risks of Silicon Complexity
https://www.rambus.com/blogs/the-security-risks-of-silicon-complexity/Ben Levine, Senior Director of Security Product Marketing at Rambus, recently spoke with Semiconductor Engineering editor-in-chief Ed Sperling about the various security challenges associated with creating complex silicon. According to Levine, there are two primary issues associated with CPUs, SoCs and embedded systems becoming increasingly complex. “Firstly, there are more things (components) that can be […]
Most Complex Processor Chip for AI Acceleration
https://www.rambus.com/blogs/most-complex-processor-chip-for-ai-acceleration/EE Times reports that Graphcore of Bristol, UK has put on the market a new type of processor for AI acceleration. It’s called the intelligence processing unit (IPU). According to CEO Nigel Toon, the IPU processor, is the most complex processor chip that’s ever been built. It’s described as “just shy of 24 billion transistors on a […]
