The MACsec-IP-160 (EIP-160) is an IP family for accelerating MACsec up to 100 Gbps, serving single channel Ethernet designs. The MACsec-IP-160 is a high-performance streaming MACsec frame processing engine that provides hardware acceleration for the complete MACsec frame transform along with frame classification and statistics counter updates. Once the MACsec-IP-160 is configured, no CPU is required for processing tasks.
Protocol aware MACsec Packet Engine with classifier and in-line interface for Single Channel Ethernet.
1..100Gbps, programmable rules, no CPU required, supports all IEEE MACsec requirements.
Supported by Driver Development Kit, QuickSec MACsec toolkit.
MACsec is ideally positioned to provide secure WAN (Layer-2) interconnect without the need for routing, allowing networks to be secured from the Inside Secure. MACsec-IP-160 use cases include: protecting links for cloud computing, data center interconnect, network appliances providing enterprise layer 2 security, automotive interconnect, ethernet PHY devices with embedded MACsec support, end-station security solutions for laptops, PCs, printers and network servers.
The MACsec-IP-160 is a MACsec engine with integrated VLAN and MACsec packet classification logic and all required statistics counters. The available MACsec-IP-160 configurations cover the applications ranging from 1 Gbps to 100 Gbps. The MACsec-IP-160 is designed to be integrated with an Ethernet MAC to form a plug-in MACsec solution between the system and an Ethernet MAC, or with two Ethernet MACs to form a plug-in MACsec solution between an existing Ethernet MAC (“system-side”) and an existing Ethernet PHY (“line-side”). A handshaked host bus interface is used to control the MAC-IP-160. Full duplex MACsec solutions comprise of an ingress (MACsec-IP-160i) and an egress (MACsec-IP-160e) core, each capable of line speed processing.
MACsec Processing Features:
Ingress Path Consistency Checking
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