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October 8, 2025

About Rambus Design Summit

As artificial intelligence transforms industries and redefines computing, memory technologies are foundational to fueling the performance, scalability, and efficiency of AI systems. RDS 2025 explores how memory innovation is enabling the AI revolution from data centers to client devices. 

Rambus Design Summit 2025 (RDS 2025), tailored for system and chip design engineers, explores the critical role of memory in enabling artificial intelligence. From the evolution of memory over the past 35 years to cutting-edge solutions for servers, accelerators, and client systems, this virtual conference showcases how Rambus technologies are driving AI performance at every level.

Attendees will gain insights into Rambus memory chip solutions for data center and client platforms, memory IP for high-performance AI accelerators, and interconnect IP technologies to scale AI infrastructure. A roundtable with Rambus experts will provide perspectives on trends and future directions in memory innovation.

Conference Agenda

Time Session Featured Speakers
8:00 AM – 8:45 AM 35 Years of Memory Innovation for AI Steven Woo
8:45 AM – 9:30AM Memory Interface Chip Solutions for Servers and AI in the Data Center Zaman Mollah
9:30 AM – 10:15 AM Memory Interface Chip Solutions for PC Clients and AI Carlos Weissenberg
10:15 AM – 11:00 AM How AI is Shaping the Memory Market Dr. Steve Woo, John Eble, Nidish Kamath, Tim Messegee
11:00 AM – 11:45 AM Memory IP for AI Accelerators: HBM4, LPDDR5, and GDDR7 Nidish Kamath
11:45 AM – 12:15 PM Scaling AI Infrastructure with PCIe 7 and CXL 3 Lou Ternullo
TimeSession
8:00 AM – 8:45 AM

35 Years of Memory Innovation for AI

Speaker: Steven Woo

In this keynote, Dr. Steve Woo reflects on the 35-year journey of Rambus and the evolution of memory technology that has culminated in today’s AI-driven computing landscape. From early innovations to modern high-bandwidth architectures, this session highlights how memory has become a foundational enabler of artificial intelligence.

Steven WooSteven Woo
Fellow and Distinguished Inventor
Rambus Labs
8:45 AM – 9:30AM

Memory Interface Chip Solutions for Servers and AI in the Data Center

Speaker: Zaman Mollah

Explore Rambus memory chip solutions designed for server platforms and AI workloads in the data center. This session covers performance, power efficiency, and scalability features that meet the demands of next-generation AI training and inference environments.

John EbleJohn Eble
VP of Product Marketing
Rambus Memory Interface Chips
Nidish KamathNidish Kamath
Director of Product Management
Rambus Silicon IP
Steven WooSteven Woo
Fellow and Distinguished Inventor
Rambus Labs
9:30 AM – 10:15 AM

Memory Interface Chip Solutions for PC Clients and AI

Speaker: Carlos Weissenberg

AI is increasingly moving to the edge, and PC clients are evolving to support intelligent applications. This session showcases Rambus memory chip solutions optimized for client platforms, enabling responsive AI experiences with performant memory architectures.

Carlos WeissenbergCarlos Weissenberg
Sr. Product Marketing Manager
Rambus Memory Interface Chips
10:15 AM – 11:00 AM

How AI is Shaping the Memory Market

Speakers: Steven Woo, John Eble, Nidish Kamath, and Tim Messegee

Join Rambus experts for a dynamic roundtable discussion on the latest trends in the memory market. Topics include AI-driven demand, enabling technologies, and the future of memory innovation across computing segments.

Raj UppalaRaj Uppala
Sr. Director of Marketing & Partnerships
Rambus Silicon IP
11:00 AM – 11:45 AM

Memory IP for AI Accelerators: HBM4, LPDDR5, and GDDR7

Speaker: Nidish Kamath

AI accelerators require high-performance memory IP to meet bandwidth, capacity and latency requirements. This session dives into Rambus IP solutions for HBM4, LPDDR5, and GDDR7, highlighting their role in powering next-gen AI silicon.

Nidish KamathNidish Kamath
Director of Product Management
Rambus Silicon IP
11:45 AM – 12:30PM

Why PCIe & CXL are Critical Interconnects for the AI Era

Speaker: Lou Ternullo

Interconnect technologies are key to scaling AI workloads across data center infrastructure. Learn how PCIe 7 and CXL 3 enable high-speed, low-latency connectivity for memory expansion and composable architectures in AI systems.

Steven WooLou Ternullo
Sr. Director of Product Management
Rambus Silicon IP

Featured Speakers

John Eble

John Eble

Vice President, Product Marketing, Rambus

Nidish Kamath

Nidish Kamath

Director of Product Management for Memory Interface IP, Rambus

Zaman Mollah

Zaman Mollah

Senior Manager for Product Management, Marketing and Applications, Rambus

Tim Messegee

Tim Messegee

Senior Director of Solutions Marketing, Rambus

Lou Ternullo

Lou Ternullo

Senior Director of Product Marketing of CXL and PCIe Controller IP, Rambus

Lou Ternullo

Lou Ternullo

Senior Director of Product Marketing of CXL and PCIe Controller IP, Rambus

Carlos Weissenberg

Carlos Weissenberg

Senior Product Marketing Manager, Rambus

Steven Woo

Steven Woo

Fellow and Distinguished Inventor, Rambus

Don't Miss Out on RDS 2025!

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