Hear Shane Rau, Research Vice President at IDC discuss the market and technology trends surrounding the DDR5 transition, including workloads, hardware needs, market perspectives and industry timing. Joining him, John Eble, Vice President of Product Marketing at Rambus will examine the changes from DDR4 to DDR5 that are enabling more memory capacity and bandwidth critical to scaling future data centers.
Rambus and Kioxia Renew Patent License Agreement
SAN JOSE, Calif. – September 21, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced that it has extended its patent license agreement with Kioxia Corporation, a world leader in memory solutions. Under the terms of the agreement, Rambus patented memory technologies will continue to be licensed to Kioxia Corporation. Specific terms of the agreement are confidential.
“The Rambus patent portfolio covers foundational technologies for the semiconductor industry, including the flash memory segment, that help improve the performance of the most advanced systems,” said Kit Rodgers, senior vice president of technology partnerships and corporate development at Rambus. “We are pleased that Kioxia has extended their patent license agreement and look forward to continuing our long-standing relationship.”
Rambus Demonstrates Industry-first PCIe® 5.0 Digital Controller IP for FPGAs
Highlights:
- Achieves industry-first demonstration of 32 GT/s PCIe 5.0 Digital Controller IP operation on leading FPGA platforms
- Expands use models for FPGAs by enabling multi-instance, PCIe 5.0 switching and bridging at 32 GT/s speeds
- Enhances performance and capabilities of FPGAs for use in emulation and prototyping, test and measurement, aerospace and defense, and storage and networking applications
SAN JOSE, Calif. – Aug. 30, 2021 – Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced that Rambus has demonstrated its PCI Express® (PCIe) 5.0 digital controller IP on leading FPGA platforms. PCIe 5.0 performance at 32 GT/s in FPGAs using a soft controller is an industry first, and another demonstration of technical leadership from Rambus. This capability expands the use models of FPGAs by enabling multi-instance, switching and bridging applications and accelerates the performance of FPGAs used in defense, networking, and test and measurement markets.
“We’ve achieved a new industry benchmark with the demonstration our PCIe 5.0 controller operating at 32 GT/s on popular FPGA platforms,” said Scott Houghton, general manager of Interface IP at Rambus. “With the growing importance of FPGAs in markets from defense to the data center, this solution developed by the newly-acquired PLDA team expands the Rambus portfolio and offers the next level of performance for mission-critical applications.”
Features of the Rambus PCIe 5.0 Digital Controller:
- Verified on leading FPGA platforms
- Supports up to 32 GT/s data rates
- Backwards compatible to PCIe 4.0 and 3.1/3.0
- Supports Endpoint, Root-port, Dual-mode, and Switch-port configurations
- Supports up to 64 Physical Functions (PF), 512 Virtual Functions (VF)
- Supports AER, ECRC, ECC, MSI, MSI-X, multi-function, crosslink, DOE, CMA over DOE, and other optional features and ECNs
For more information on the Rambus digital controller, please visit rambus.com/interface-ip/controllers/. Or to find out more details on Rambus Interface IP, including our PHYs and Controllers, please visit rambus.com/interface-ip.
CXL 2.0 Controller Product Brief
The Rambus Compute Express Link (CXL) 2.0 Controller leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache and CXL.mem paths specific to the CXL standard.
CXL 2.0 Controller with AXI Product Brief
The Rambus Compute Express Link (CXL) 2.0 Controller with AXI leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache and CXL.mem paths specific to the CXL standard. This controller offers support of the AMBA AXI, CPI and AMBA CXS-B protocol specifications.
PCIe 5.0 Controller with AXI Product Brief
The Rambus PCIe 5.0 controller with AXI is designed for maximum performance and ease of use for PCI Express (PCIe) 5.0 applications. It comprises a complete SerDes subsystem with the Rambus PCIe 5.0 PHY or can integrate with PIPE 5.x-compliant 3rd-party PHYs. The controller is backwards compatible with PCIe 4.0, and 3.1/3.0.
