[Aug 18 at 11am PT] Join Rambus for a live webinar as we explore the industry’s transition from traditional aggregated servers to modern scale-up, scale-out, and disaggregated architectures. We will also discuss the critical role of PCI Express® (PCIe®) as the foundational interconnect for next-generation infrastructure and explains how PCIe switches and PCIe retimers enable scalable, high-performance connectivity across increasingly disaggregated environments.
DDR5 RCD 9600 MT/s Product Brief
The Rambus Registering Clock Driver (RCD) RCD06 enables DDR5 Registered DIMMs (RDIMMs) operating up to 9600 MT/s. Download this brief to review the RCD functional block diagram, see the specifications and features, and check out the DDR5 RDIMM block diagram.
Rambus Enables Next-Generation AI and Data Center Platforms with DDR5 9600 Server RDIMM Chipset
DDR5 9600 RDIMM chipset addresses rising memory performance and power management demands driven by AI and data-intensive workloads on advanced CPU-based servers
- Introduces new 6th Generation Registering Clock Driver (RCD06) operating at 9600 MT/s, a 20% increase in data rate over prior generation solution
- Offers complete chipset, including RCD06, PMIC5030 power management IC, SPD Hub and Temperature Sensor ICs, to simplify module development and speed time to market
- Enables breakthrough memory bandwidth, capacity and power efficiency for agentic AI, HPC and demanding data center workloads running on advanced CPU-based servers
Figure 1: Rambus DDR5 9600 Server RDIMM Chipset
SAN JOSE, Calif. – July 8, 2026 – Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced its DDR5 9600 Server RDIMM chipset designed to deliver industry-leading memory performance for next-generation data center platforms. Built around the new Rambus 6th Generation Registering Clock Driver (RCD06) with a 20% increase in bandwidth over the prior generation, this complete chipset enables RDIMMs operating at up to 9600 MT/s, unlocking a new level of bandwidth and capacity required by agentic AI, high-performance computing (HPC) and other data-intensive workloads.
The accelerating evolution of AI from model training to large-scale inference and agentic workflows is driving a structural increase in server memory requirements. These workloads are highly iterative and memory-intensive, requiring significantly higher bandwidth and capacity for orchestration and execution. For large language model inference, techniques such as key-value (KV) caching further increase memory capacity and bandwidth requirements by storing and repeatedly accessing contextual data to reduce compute overhead and accelerate token generation. At the same time, CPU platforms are increasing core counts and memory channel density, amplifying demand for faster DIMMs and higher aggregate memory bandwidth. Together, these trends are making memory performance and power delivery critical determinants of overall system throughput. The Rambus DDR5 9600 RDIMM chipset directly addresses these requirements, empowering server makers to build scalable platforms capable of supporting next-generation AI infrastructure.
“The rapidly accelerating adoption of agentic AI and AI inference workloads is driving unprecedented demand for higher memory bandwidth and capacity in the data center,” said Rami Sethi, SVP and general manager of Memory Interface Chips at Rambus. “With our DDR5 9600 RDIMM chipset featuring the new RCD06, Rambus continues to extend its leadership in high-speed memory interface solutions, enabling our customers to deliver the performance and reliability required for next-generation server platforms.”
“As data center architectures evolve to support increasingly complex workloads, memory bandwidth, latency and reliability are becoming critical system-level design considerations,” said Soo Kyoum Kim, associate VP at IDC. “Complete RDIMM chipsets from companies like Rambus address these demands by enabling higher-performance, scalable memory subsystems that can keep pace with next-generation AI and cloud infrastructures.”
The Rambus DDR5 9600 RDIMM chipset is a complete solution designed to support next-generation CPU-based server platforms. In addition to the RCD06, the chipset includes the PMIC5030 power management IC, which delivers efficient, high-current power at low voltage levels to support advanced DDR5 RDIMM configurations. The chipset also includes a Serial Presence Detect (SPD) Hub with an integrated temperature sensor, along with dedicated Temperature Sensor ICs, enabling critical module telemetry, configuration and thermal monitoring functions.
By integrating clocking, control and power management into a cohesive solution, the chipset ensures robust signal and power integrity at high data rates, reducing design complexity for memory module manufacturers and improving overall system reliability. This level of integration is particularly critical as server architectures scale to support higher processor core counts, larger memory capacity and sustained demands of continuously operating AI workloads.
More Information
Learn more about the Rambus DDR5 9600 Server RDIMM chipset at https://www.rambus.com/memory-interface-chips/ddr5-dimm-chipset/.
About Rambus Inc.
Rambus delivers industry-leading chips and silicon IP for the data center and AI infrastructure. With over three decades of advanced semiconductor experience, our products and technologies address the critical bottlenecks between memory and processing to accelerate data-intensive workloads. By enabling greater bandwidth, efficiency and security across next generation computing platforms, we make data faster and safer. For more information, visit rambus.com.
Forward-Looking Statements
Information set forth in this press release, including statements as to Rambus’ outlook and financial estimates and statements as to the expected timing and effects of Rambus products, constitute forward-looking statements within the meaning of the safe harbor provisions of the Private Securities Litigation Reform Act of 1995.
These statements are based on various assumptions and the current expectations of the management of Rambus and may not be accurate because of risks and uncertainties surrounding these assumptions and expectations. Factors listed below, as well as other factors, may cause actual results to differ significantly from these forward-looking statements. There is no guarantee that any of the events anticipated by these forward-looking statements will occur, or what effect they will have on the operations or financial condition of Rambus. Forward-looking statements included herein are made as of the date hereof, and Rambus undertakes no obligation to publicly update or revise any forward-looking statement unless required to do so by federal securities laws.
Major risks, uncertainties and assumptions include, but are not limited to: any statements regarding anticipated operational and financial results; any statements of expectation or belief; other factors described under “Risk Factors” in Rambus’ Annual Report on Form 10-K and Quarterly Reports on Form 10-Q; and any statements of assumptions underlying any of the foregoing. It is not possible to predict or identify all such factors. Consequently, while the list of factors presented here is considered representative, no such list should be considered to be a complete statement of all potential risks and uncertainties.
Data Center Evolution: DDR5 DIMMs Advance Server Performance
Download this white paper to explore how DDR5 DIMMs address these emerging requirements, delivering significant advancements in data rate, density, power efficiency, and channel architecture over DDR4. It examines the role of DDR5 as the foundational memory layer in modern AI infrastructure, complementing heterogeneous compute architectures and supporting highly concurrent, data-driven workloads, while also outlining the key design considerations required to achieve reliable, high-performance operation in next-generation servers.
RT-648 Embedded HSM Root of Trust with Arm Cortex-M33 Processor Product Brief
Download this brief to review the Rambus RT-648 Embedded HSM Root of Trust with Arm Cortex-M33 Processor.
Securing the Software Defined Vehicle: How Rambus and Telechips Enable Safe, Scalable Automotive SoC
Automotive architectures are rapidly shifting from distributed ECUs to centralized, zonal computing models designed for the software-defined vehicle (SDV). As workloads such as AI-driven ADAS, digital cockpits, and OTA updates increase system complexity, automakers are consolidating functions onto high-performance SoCs, improving efficiency but raising new challenges in isolation and security. To address this, Telechips is developing scalable, heterogeneous SoC platforms with built-in, system-level security, including the hardware-based Root of Trust, the Rambus RT-648 incorporating an Arm Cortex-M33 processor enabling secure boot, robust key management, and trusted system operation.
