Download this white paper to explore how DDR5 DIMMs address these emerging requirements, delivering significant advancements in data rate, density, power efficiency, and channel architecture over DDR4. It examines the role of DDR5 as the foundational memory layer in modern AI infrastructure, complementing heterogeneous compute architectures and supporting highly concurrent, data-driven workloads, while also outlining the key design considerations required to achieve reliable, high-performance operation in next-generation servers.
RT-648 Embedded HSM Root of Trust with Arm Cortex-M33 Processor Product Brief
Download this brief to review the Rambus RT-648 Embedded HSM Root of Trust with Arm Cortex-M33 Processor.
Securing the Software Defined Vehicle: How Rambus and Telechips Enable Safe, Scalable Automotive SoC
Automotive architectures are rapidly shifting from distributed ECUs to centralized, zonal computing models designed for the software-defined vehicle (SDV). As workloads such as AI-driven ADAS, digital cockpits, and OTA updates increase system complexity, automakers are consolidating functions onto high-performance SoCs, improving efficiency but raising new challenges in isolation and security. To address this, Telechips is developing scalable, heterogeneous SoC platforms with built-in, system-level security, including the hardware-based Root of Trust, the Rambus RT-648 incorporating an Arm Cortex-M33 processor enabling secure boot, robust key management, and trusted system operation.
The Ultimate Guide to PCI Express
The PCI Express® 6.0 (PCIe® 6.0) specification was released by PCI-SIG® in January 2022. This new generation of the ubiquitous PCIe standard brought with it many exciting new features designed to boost performance for compute-intensive workloads including data center, AI/ML and HPC applications. PCIe 6.0 has now evolved to version 6.1 of the standard. Find out all about PCIe 6.1 in the article below.
DDR5 CKD 9600 MT/s Product Brief
The Rambus Client Clock Driver (CKD) enables DDR5 CUDIMMs, CQDIMMs and CSODIMMs to operate at state-of-the-art data rates of up to 9600 Megatransfers per second (MT/s) and deliver breakthrough performance in next-generation AI PCs.
Rambus Enables Next-Generation AI PC Memory with Complete Client Chipset for CUDIMM and CSODIMM Modules
Industry’s fastest DDR5 Client Chipset, with Gen2 Client Clock Driver (CKD02), PMIC5120 and SPD Hub, offers breakthrough performance of up to 9600 MT/s
- Enables advanced agentic AI, gaming and content creation workloads in future generation PC desktops and laptops
- Supports high-bandwidth, high-capacity CUDIMM, CQDIMM and CSODIMM memory module form factors
- Extends Rambus comprehensive memory module chipset offerings for server to client platforms
SAN JOSE, Calif. – May 26, 2026 – Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced its complete DDR5 9600 Client Memory Module Chipset for high-performance CUDIMM, CQDIMM and CSODIMM modules in future generation AI PCs. The chipset includes the new Gen2 Client Clock Driver (CKD02), delivering breakthrough performance with support for PC memory module operation of up to 9600 MT/s, Power Management IC (PMIC5120) and Serial Presence Detect Hub (SPD Hub).
With the rise of agentic AI, PCs now plan, execute, and adapt workflows in real time. These workloads require persistent context, concurrent processing, and continuous data movement between the processor and system memory requiring significant increases in both bandwidth and capacity. At the same time, scaling DDR5 memory beyond 6400 MT/s introduces new technical challenges, including signal degradation, clock jitter, and timing instability. To address these challenges, the industry is transitioning to clocked memory modules, including CUDIMM and CQDIMM for desktops and CSODIMM for laptops, which incorporate an on-module client clock driver (CKD) to condition and redistribute the clock signal.
The new Rambus DDR5 9600 Client Chipset provides a complete solution for clocked DDR5 modules operating from 8000 to 9600 MT/s. Designed for performance and scalability, the chipset supports next-generation AI PCs, notebooks, and workstations. By addressing signal integrity, power delivery, and system coordination at the module level, Rambus simplifies the design and deployment of high-performance memory module solutions.
“Agentic workloads are fundamentally more memory-hungry, driving the need for higher memory bandwidth, greater capacity, and improved efficiency in AI-enabled PCs,” said Rami Sethi, SVP and general manager of Memory Interface Chips at Rambus. “Our DDR5 9600 Client Chipset, featuring the Gen2 Client Clock Driver, delivers the performance foundation needed to enable this new era of intelligent, high-performance client systems for AI-driven productivity, next-generation gaming and professional content creation.”
“As AI-driven workloads become increasingly pervasive across client devices, memory subsystem innovation will be key to unlocking their full potential,” said Jeff Janukowicz, research vice president at IDC. “To meet growing performance demands, the industry is transitioning to clocked memory architectures such as CUDIMM and CSODIMM, which are designed to address signal integrity and timing challenges at higher data rates. Complete chipset solutions that deliver stable, high-speed operation will play a critical role in accelerating the adoption of next-generation AI PCs.”
The Rambus DDR5 9600 Client Chipset supporting high-bandwidth, high-capacity, clocked client memory modules and includes:
- Gen2 Client Clock Driver retimes, conditions and distributes the clock sent from the processor to the DRAM devices on the DIMM
- PMIC5120 efficiently steps down the system voltage supply to the voltage levels needed to power the DRAM and all other active chips on the module
- SPD Hub enables communication of module identification, configuration, and telemetry
More Information
Learn more about the Rambus DDR5 9600 Client Memory Module Chipset at: https://www.rambus.com/memory-interface-chips/ddr5-client-dimm-chipset/
About Rambus Inc.
Rambus delivers industry-leading chips and silicon IP for the data center and AI infrastructure. With over three decades of advanced semiconductor experience, our products and technologies address the critical bottlenecks between memory and processing to accelerate data-intensive workloads. By enabling greater bandwidth, efficiency and security across next generation computing platforms, we make data faster and safer. For more information, visit rambus.com.
Forward-looking statements
Information set forth in this press release, including statements as to Rambus’ outlook and financial estimates and statements as to the expected timing and effects of Rambus products, constitute forward-looking statements within the meaning of the safe harbor provisions of the Private Securities Litigation Reform Act of 1995.
These statements are based on various assumptions and the current expectations of the management of Rambus and may not be accurate because of risks and uncertainties surrounding these assumptions and expectations. Factors listed below, as well as other factors, may cause actual results to differ significantly from these forward-looking statements. There is no guarantee that any of the events anticipated by these forward-looking statements will occur, or what effect they will have on the operations or financial condition of Rambus. Forward-looking statements included herein are made as of the date hereof, and Rambus undertakes no obligation to publicly update or revise any forward-looking statement unless required to do so by federal securities laws.
Major risks, uncertainties and assumptions include, but are not limited to: any statements regarding anticipated operational and financial results; any statements of expectation or belief; other factors described under “Risk Factors” in Rambus’ Annual Report on Form 10-K and Quarterly Reports on Form 10-Q; and any statements of assumptions underlying any of the foregoing. It is not possible to predict or identify all such factors. Consequently, while the list of factors presented here is considered representative, no such list should be considered to be a complete statement of all potential risks and uncertainties.
