AI & Machine Learning
Rambus Design Summit Featured Speaker: Frank Ferro
Thanks to everyone who joined us for Rambus Design Summit 2021. Over the coming weeks we’ll highlight the webinars and panels from the event all
August 13, 2021
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Memory PHYs
451 Research Report: Interconnecting AnalogX and PLDA with Rambus
Compute Express Link (CXL) will enable memory expansion and pooling. Memory pooling with CXL 2.0 allows for the tailored matching of workloads to the available
August 3, 2021
AI & Machine Learning
Stacking memory for AI/ML training with HBM2E
Frank Ferro, Senior Director Product Management at Rambus, recently penned an article for Semiconductor Engineering that takes a closer look at high bandwidth memory (HBM)
May 6, 2021
AI & Machine Learning
Powering the Next Wave of AI Applications
Artificial Intelligence/Machine Learning (AI/ML) grows at a blistering pace. The size of the largest training models has passed 100 billion parameters and is on pace
April 29, 2021
HBM and GDDR6
HBM2E targets AI/ML training
Frank Ferro, Senior Director Product Management at Rambus, has written a detailed article for Semiconductor Engineering that explains why HBM2E is a perfect fit for
March 18, 2021
Memory PHYs
How PCIe 5 Can Accelerate AI and ML Applications
Rambus’ Suresh Andani has written a detailed Semiconductor Engineering article that explores how PCIe 5 can effectively accelerate AI and ML applications. According to Andani,
November 9, 2021