A San Francisco-based startup known as SiFive has announced plans to develop and sell chips based on open-source RISC-V architecture. According to Don Clark of the Wall Street Journal, the tech includes a set of instructions that define the functions of a microprocessor, which can serve as a starting point for designing a chip.
“RISC-V can be used without charge and freely modified, similar to the way open-source programs like Linux are now used by many companies,” Clark explained. “Its backers see it is an antidote to stiff development costs and other market forces that have deterred chip designers.”
As Clark notes, RISC-V isn’t the first attempt at open-source chips.
“[However], backers say it has gained outsize momentum, inspiring programmers to write versions of Linux and other software to exploit it,” he added.
Commenting on the announcement, Rambus CEO Ron Black told the Wall Street Journal that the SiFive idea was quite intriguing.
“If the industry is not going to grow, maybe we should think about different models,” he said.
SiFive CTO Yunsup Lee expressed similar sentiments during an interview with The Platform.
“The semiconductor industry is at an important crossroads,” he stated. “Moore’s Law has ended and the traditional economic model of chip building no longer works. Unless you have tens, if not hundreds, of millions of dollars, it is simply impossible for smaller system designers to get a modern, high performance chip, much less one customized to unique requirements.”
Meanwhile, David Kanter, a processor analyst with The Linley Group, told the EE Times open source hardware could potentially decrease the cost of new design starts by enabling more design re-use and lower IP costs. However, Kanter cautioned that while open source has proven to be a powerful force in the software world, it remains uncertain how the concept will map into the hardware world.
Nevertheless, RISC-V has already gained significant momentum in recent months. For example, engineers at ETH Zurich and the University of Bologna debuted the 32-bit PULPino, an open-source microprocessor based on RISC-V architecture. The PULPino – taped out as a 65nm ASIC – is now available for RTL simulation and FPGA mapping.
On the software side, engineers at Genode unveiled new support for RISC-V CPU architecture. For the uninitiated, the Genode Framework can perhaps best be described as a tool kit for building highly secure special-purpose operating systems. It is capable of scaling from embedded systems with as little as 4 MB of memory to highly dynamic general-purpose workloads. According to Norman Feske of OS News, RISC-V is a “possible answer” to the call for more trustworthy hardware. To be sure, such a prospect is what motivated the Genode project to take a closer look at the open source ISA.
As recently noted in “Charting a New Course for Semiconductors,” the success of open-source software – as opposed to a closed, walled-garden approach – has set an important precedent for the semiconductor industry. In fact, more than 95 percent of today’s web servers run on variants of the Linux operating system, while approximately 85 percent of smartphones sold worldwide use the open-source Android mobile operating system (OS).
Interested in learning more about RISC-V architecture? You can check out the official RISC-V Foundation site here.