CSI-2 Controller Core V2 Now Available
Northwest Logic has released its second generation CSI-2 Controller Core V2. This core utilizes a 64-bit core width to support the fastest D-PHY and C-PHY data rates available now and anticipated in the future at controller clock frequencies which are easy to close timing. This core fully supports the MIPI D-PHY 1.2/2.0 (up to 8 lanes) and C-PHY 1.0/1.1 standards (up to 4 trios). Leveraging over 6 years of MIPI experience, this second generation core provides the same easy-to-use, silicon-proven functionality of the first generation core with lower latency and lower power. For more information, contact Northwest Logic.
Live HBM/2.5D Seminar, March 9, 2016 in Mountain View, CA
SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High-Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to interconnect an SoC and an HBM memory stack. Many companies are already using HBM to create very high-bandwidth, low-power products. This seminar will present a complete HBM supply chain that is delivering and supporting customer HBM/2.5D designs now.
Wednesday, March 9, 2016
4:00-7:00 PM Pacific time
Computer History Museum
Mountain View, California
Learn More Register
FIDUS/Inrevium MIPI D-PHY Board Available
FIDUS’s Meticom-based, dual-MIPI FMC Board supports two MIPI D-PHY interfaces (1 Tx and 1 Rx). Each of these interfaces can be used for 1-4 lane CSI-2 or DSI operation. This MIPI FMC card connects with a large number of Inrevium and other vendors’ FMC-compatible FPGA baseboards. This board enables system designs which interface to CSI-2 image sensors or DSI displays to be quickly created. Northwest Logic’s CSI-2 and DSI Controller Cores fully support this board. To view a demonstration of a MIPI reference design which includes Northwest Logic’s cores, click on this link: YouTube. Contact Fidus or Northwest Logic for more information.
Northwest Logic and Toshiba are collaborating to expand capabilities for the Toshiba FFSA™ and ASIC platforms
Northwest Logic and Toshiba have combined efforts to provide a complete, high-performance DDR and PCIe integrated solution for Toshiba’s custom LSIs including the Toshiba Fit Fast Structured Array (FFSA™) and ASIC platforms. This complete offering consists of Northwest Logic’s DDRx controllers and PCI Express cores fully integrated and verified with Toshiba DDR and PCIe PHYs. These solutions are available now and are being implemented by our first customer through this joint effort. “Through our collaboration with Northwest Logic, we are able to offer robust pre-verified PHY/controller sub-systems increasing the added value and reducing customer time to market,” said Doug Day, vice president Engineering Design Solution Group, Toshiba America Electronic Components, Inc. Please contact Northwest Logic for more information.
Rambus and Northwest Logic PCIe ASIC solution
Northwest Logic’s Express 3.0 Core has been fully integrated and validated with the Rambus R+ Multi-protocol PHY for PCIe at a leading-edge foundry. This complete solution is silicon-proven in a 28nm testchip which will be used for PCIe-SIG certification. “As SoC design complexity continues to increase, this integrated offering provides an easy-to-use, comprehensive solution for PCIe 3.0 Endpoint applications,” said Khalid Ansari, VP, High-Speed Interface Marketing at Rambus. “We look forward to continuing our partnership with Northwest Logic as we continue to design and deliver high-quality solutions for our customers.” For more information contact Northwest Logic or Rambus.
Northwest Logic Launches Its New and Improved Website
Visit the new and improved website at www.nwlogic.com
Northwest Logic Adds New Asia-Pacific Sales Reps
Northwest Logic has brought on the following sales reps to further expand our Asia-Pacific presence:
We look forward to serving our customer needs in in the Asia-Pacific with the assistance of these companies.