Newsletters

Looking Ahead to 2020 from Northwest Logic, now part of Rambus

Northwest Logic is now part of Rambus Inc., a premier silicon IP and chip provider. We are now proud to offer comprehensive memory and SerDes IP solutions, including PHYs and controllers. We continue to offer standalone controllers, providing customers with the ability to get the solution that exactly matches their needs. We look forward to serving our existing ASIC and FPGA customers with a full range of IP solutions.

“Northwest Logic’s product lineup and expertise are a great complement to our current portfolio and serve a critical role in our customers’ success.”

-Luc Seraphin, CEO, Rambus

For more information about the acquisition, visit rambus.com/northwestlogic. Or, contact us to discuss how we can help you with your market leading solutions for data center, artificial intelligence (AI), machine learning (ML), communications and automotive applications.

Rambus will be at DesignCon 2020

Rambus will be in booth #1035 at DesignCon 2020 in Santa Clara, CA, Jan 28-30, 2020 presenting HBM2, GDDR6 and 112 Gbit/s SerDes demos. Rambus will also be hosting free training sessions on a variety of topics including automotive, memory, 5G and packaging options on Wednesday, January 29th. If you would like to have a face-to-face meeting to discuss our latest Memory (HBM2/2E, GDDR6), PCIe (Gen 5/4, DMA) or MIPI IP (CSI-2, DSI-2) solutions, click here.

The Rambus’s Full-Featured, High-Performance PCI Express™ 5.0
Solution Available Now!

Rambus has been delivering PCI Express® solutions for more than a decade. These solutions have been used in many designs including Data Storage, Communications, Broadcast, Military and Medical applications in ASIC, structured ASIC and FPGA platforms. Rambus now offers a complete interface solution for PCI Express 5.0, including a PCI Express PHY and PCI Express 5.0 Core. The PCI Express 5.0 Core offers a rich feature-set including:

• PCI Express™ 5.0 specification compliant-backward compatible with PCIe 4/3/2/1
• x16, x8, x4, x2, x1 lane with bifurcation support
• 32 Gbit/s SERDES, RP, EP, Switch support
• Endpoint, Root Port, Switch support
• High-performance, easy-to-use core with optional scatter-gather DMA support
• Available with Rambus PCIe Gen 5 PHY for ASIC designs

This PCI Express 5.0 Core provides a robust, high-performance platform for developing PCI Express™ 5.0 based products and is already been designed into new ASIC PCIe Gen 5 designs. Contact Rambus for more information on how to start your PCIe™ 5.0 design now!

Rambus 16Gbps GDDR6 PHY and Controller Achieved Qualification in 4Q19

The Rambus 16 Gbps GDDR6 PHY and Controller solution has completed silicon qualification and is now production ready. Rambus is the first company to provide a silicon-proven 16 Gbps GDDR6 memory subsystem, and has demonstrated operation up to 18 Gbps. Announced earlier this year, the GDDR6 silicon was taped out on an advanced process node and is well suited for data center, AI/ML, high-performance computing (HPC), automotive and networking applications, that need higher bandwidth memory. Rambus is an early promoter of GDDR6 technology and has been working closely with customers to bring this technology to market. Achieving first silicon success at 18 Gbps is a testament to product quality and first-time right silicon that customers have come to expect from Rambus. Learn how Rambus can help you with a comprehensive high-performance memory PHY and controller solution that meets your compute-intensive needs. Please contact Rambus for more information.

Rambus GDDR6 and LPDDR4 Controller Core Now Available with In-Line ECC

Rambus now offers In-Line ECC support with its GDDR6 Controller Core and LPDDR4 Controller Core. This support enables efficient single bit correction and double bit error detection using the same memory for both user and ECC data. Traditional, Out-Of-Band ECC requires a separate memory for user and ECC data. In-Line ECC is particularly useful for GDDR6 and LPDDR4 applications because those memories do not support the smaller data widths needed to efficiently implement Out-Of-Band ECC. This support enables highly differentiated solutions for high-performance networking, autonomous vehicles, artificial intelligence, and 5G infrastructure applications. Click here for more information.

Rambus DSI-2 Controller Core Now Available with Full Featured Video Interface

The Rambus DSI Controller core is now available with a full featured DSI-2 Video Interface. This DSI-2 Video Interface is a superset of the DPI-2 Interface adding support for all DSI-2 data types, multiple pixel per clock support, and enhanced retiming with this Hsync/Vsync style interface. Contact us to learn more about how we can help you with all of your MIPI design requirements.

AED Engineering Leverages Rambus’ CSI-2 Controller Cores in SERDES Logging Adapter

AED Engineering, a one-of-a-kind provider of electrics/electronics engineering services, offers a CSI-2 Tx and CSI-2 Rx interface in their SerDes Logging Adapter (SLA). The SLA with time stamped CSI-2 packet recording and retransmission eases validation of automated driving functionalities requiring precisely recorded data from vehicle sensors like video or radar based on real driving scenes. “Rambus’ high-quality IP and excellent technical support enabled our product team to create our unique time stamped CSI-2 interface system,” said Ralf Mayer, Design Architect at AED Engineering. Please contact Rambus or AED Engineering for more information.

Northwest Logic is the HBM2 Controller Market Leader

Since the first demonstration in 2015, Northwest Logic’s HBM2 controllers have become market’s preferred choice:

• 31 customer designs and 9 test chips
• Silicon proven on TSMC, Samsung, Global Foundries processes
• Full support for HBM2, HBM2E and Low Latency HBM devices
• Broadcom, Rambus, eSilicon and Synopsys HBM PHY support
• Used in broad array of AI, data center, networking and HPC applications

“Our HBM Controllers are highly configurable enabling our customers to optimize the performance, size and power of their designs,” said Brian Daellenbach, President of Northwest Logic. For more information please contact Northwest Logic.

eSilicon Tapes Out 7nm Combo PHY (HBM2/HBM2E) Test Chip with Northwest Logic’s HBM2 Controller Core

eSilicon recently announced the tape out of an 7nm HBM2/HBM2E Test Chip which includes Northwest Logic’s market leading HBM2 Controller. “HBM memory stacks are a critical component for many of our new FinFET-class 2.5D ASICs,” said Hugh Durdan, vice president, strategy and products at eSilicon. “We look forward to validating the performance and functionality of our combo PHY and Northwest Logic’s controller to support the latest HBM capabilities.” “We are pleased to work with our partner, eSilicon, on the validation of our Controller for HBM2E and with the previously taped out low latency test chip,” said Brian Daellenbach, president of Northwest Logic. Click here for more information about eSilicon’s 7nm networking IP platform. Click here for more information on Northwest Logic’s Memory solutions.

Northwest Logic’s PCI Express® 5.0 Solution Available Now

Northwest Logic has been delivering PCI Express solutions for more than a decade. These solutions have been used in many designs including in the military, medical, data storage, communications, broadcast applications in ASICs, structured ASICs and FPGAs. Northwest Logic now adds to this silicon-proven solution its high-performance PCI Express 5.0 Core. The PCI Express 5.0 Solution offers a rich feature-set including:

• High-performance, easy-to-use core with optional scatter-gather DMA support
• PCI Express™ 5.0 specification compliant-backward compatible with PCIe 4/3/2/1
• x16, x8, x4, x2, x1 lane with bifurcation support
• 32 Gbit/s SERDES, RP, EP, Switch support

Contact Northwest Logic for more information and to start your PCIe® 5.0 ASIC designs now!

Automotive Tier1 Advanced Video System Deployed with Northwest Logic’s CSI-2 Controller Cores

German Automotive Tier1s have a long history of delivering products with top quality and reliability including deploying technology targeted at improved automotive safety. “Northwest Logic’s CSI-2 Controller Core solution met all our Video System requirements. After a rigorous evaluation we deployed Northwest Logic’s multi-streaming CSI-2 Controller Receiver (Rx) and Transmitter (TX) Cores in our advanced video system. Their high-quality IP and excellent technical support and high-quality IP enabled our product team to deliver our upcoming multi-stream MIPI video system on time,” said Christian Schwarz, Senior Designer at a German Automotive Tier1. Please contact Northwest Logic for more information.

Northwest Logic Presenting at Rambus China Seminars

Rambus is hosting technical seminars in Shanghai on May 14th and Beijing on May 17th. These seminars will describe how to achieve higher memory and SERDES interface performance and power efficiency in applications such as artificial intelligence and wireline communication. Northwest Logic will be presenting in both the memory and SERDES interface portions of the seminars. For more information and to register click here.

Northwest Logic Will Be Participating In the Samsung Foundry Forum

Northwest Logic, a Samsung HBM Ecosystem Partner (see white paper), will be participating in the Samsung Foundry Forum on May 14, 2019 at the Santa Clara Marriott.  Northwest Logic’s controllers are being used by our customers in multiple Samsung Foundry nodes including 8nm”.  Please stop by Northwest Logic’s kiosk to learn about Northwest Logic’s HBM2, GDDR6, PCIe 5.0, CSI-2 and DSI-2 controller cores for your next Samsung Foundry design.

Implementing HBM in SIP – a DAC 2019 Session From Samsung Electronics

In this session, Samsung will describe how to implement High Bandwidth Memory (HBM) in System In Package (SiP) applications, including design, verification and test.  The presentation reflects more than 3 years of Samsung’s HBM manufacturing proficiency across a wide range of customer applications (HPC, AI, Network, Graphics, etc.).  Northwest Logic is an important IP provider in Samsung’s HBM ecosystem.  For more details about this session, click here.

Northwest Logic Will Be At Design Automation Conference (DAC) 2019

Northwest Logic will be at DAC 2019 in Las Vegas, June 4^th and 5^th.  Please contact us if you are going to be at DAC and would like to have a face-to-face meeting to discuss our latest Memory, PCIe or MIPI IP products and roadmap.

Northwest Logic’s PCI Express™ 5.0 Solution Available Now

Northwest Logic’s PCI Express 5.0 solution is available now including PCI Express 5.0 Core that is:

• PCI Express™ 5.0 specification compliant (32 Gbit/s lane rate support)
• x16, x8, x4, x2, x1 lane with bifurcation support
• Endpoint, Root Port, Switch support
• more

This solution also includes Northwest Logic’s family of Expresso DMA Cores and DMA Drivers which provide the maximum system throughput on a PCI Express link.

This PCI Express 5.0 solution provides a robust, high-performance platform for developing PCI Express™ 5.0 based products.  It is currently available for use in ASIC platforms. Contact Northwest Logic for more information on how to start your PCIe™ 5.0 design now!

Northwest Logic’s GDDR6 Controller Core Available Now

Northwest Logic has delivered production versions of its GDDR6 Controller Core. The GDDR6 Controller Core supports single x32 or dual x16 controller configurations as well as GDDR6 clamshell mode.  It includes queue-based look-ahead command processing and an optional command reordering function for maximum bus utilization. It also includes support for automatic retry when interface data errors are detected, and can be configured with in-band ECC checking as an add-on option. The GDDR6 controller solution can be delivered fully integrated and verified with the Rambus GDDR6 PHY. GDDR6 supports 60 GB/s transfer rates with a single device while utilizing proven BGA packaging and provides a significant performance advantage over DDR4. This enables highly differentiated solutions for high-performance networking, autonomous vehicles, artificial intelligence, and 5G infrastructure applications. Click here for Northwest Logic’s Memory Interface Solution information. Click here to review the Micron GDDR6 Technical Note.

Northwest Logic Delivering HBM2 Controller Core With HBM2E Support

Northwest Logic is delivering its HBM2 Controller solution with full support of the latest JEDEC standard (JESD235B).  This standard, informally referred to as HBM2E, extends the supported HBM2 stack heights up to 12 high and channel densities up to 24 Gbit.  At the same time, the HBM2 device providers are extending the supported data rates up to 3.2 Gb/s/pin for a total bandwidth of 400 Gbytes/s. “We are very pleased to provide comprehensive HBM2E support. This support further fortifies our industry leading HBM2 Controller solution” said Brian Daellenbach, President of Northwest Logic. Please contact Northwest Logic for more information.

Northwest Logic’s Low Latency HBM Support Released

Northwest Logic has collaborated with Renesas and eSilicon to deliver a comprehensive Low Latency HBM solution.  Renesas’ Low Latency HBM devices support random memory accesses with high throughput and small data granularity making them attractive for a wide range of next generation applications. “We are excited to offer Low Latency HBM device support as part of our overall HBM2 solution,” said Brian Daellenbach, President at Northwest Logic.  Northwest Logic and eSilicon provide a complete HBM2 controller and PHY solution with Low Latency HBM support.  “eSilicon has verified our Low Latency HBM PHY and Northwest Logic’s controller in a 7nm process,” said Hugh Durdan, vice president, strategy and products at eSilicon. For more information please click on: Renesas Low Latency HBM, eSilicon PHY, or Northwest Logic Memory Controller.

Northwest Logic Includes Avery Memory Models In Its Deliveries

Northwest Logic’s memory controller deliveries now include an evaluation version of Avery Design Systems memory models.  Avery’s full featured memory models include HBM2E, HBM2, GDDR6, DDR4 and LPDDR4 support; configurable device speeds and density, built-in protocol analyzer for debugging and performance analysis; and broad memory vendor device support.  Avery’s memory models also support advanced device speeds much earlier than the memory device vendors, enabling designs to be future proofed.  Please contact Northwest Logic or Avery Design Systems for more information.

Northwest Logic’s DSI Controller IP Used in Inova Semiconductors Multichannel Automotive SerDes Devices

Inova Semiconductors GmbH has just announced its latest Multichannel Automotive SerDes devices, the INAP565TAQ and INAP562RAQ. These new APIX3 devices utilize Northwest Logic’s MIPI® DSI^SM Host, DSI^SM Peripheral Controller cores to provide high speed video, data, audio and Ethernet connections over a 12 Gbps link up to 10m distance. The devices are being used by several well-known car brands and can connect Navigation displays, Cluster displays, Head up displays or Rear Seat entertainment. “We are very pleased with the quality, ease of integration and support provided by Northwest Logic. The DSI Peripheral is seamlessly integrated into the INAP565TAQ and the DSI Host is integrated in the INAP562R”, said Roland Neumann, Executive VP Engineering at Inova Semiconductor. Click here for more information.

Northwest Logic MIPI DSI-2 Host Controller and Mixel C-PHY/D-PHY Combo IP Integrated into Synaptics VXR7200 IC Enabling Next Generation VR Headsets

Synaptics achieved first-time silicon success supporting full-production-readiness with the NWL DSI-2 Host Controller and the Mixel Combo PHY. This IP is delivered fully integrated and validated.  With D-PHY @2.5Gbs/lane for Legacy infrastructure and C-PHY support at 2.5Gsym/sec the, fully integrated IP provide the bandwidth and scan timing and interoperability required to eliminate screen door effects and enables the ability to read text. The VXR7200 is optimized for VR, AR, and MR dual displays headsets. Click here for the full press release.

Northwest Logic and Rambus Present Cutting Edge HBM2 and GDDR6 Solutions Webinar

Please join us as we discuss the features, benefits and availability of our cutting edge HBM2 and GDDR6 solutions.  These fully integrated controller and PHY solutions are optimized to meet the needs of high-performance applications including machine learning, data mining, and networking.

When: October 30, 2018 at 7am PDT (California)
October 30, 2018 at 5pm PDT (California)
This webinar has concluded.

Northwest Logic and Mixel Delivering C-PHY/D-PHY Combo MIPI IP Solution

Northwest Logic’s CSI-2^SM and DSI-2^SM MIPI® Controller Cores and Mixel’s C-PHY^SM/D-PHY^SM Combo IP have been silicon proven in 28nm and deployed in 55nm and 65nm process nodes. C-PHY provides significantly more bandwidth (17.1 vs 10 Gbps) with the same pin count as D-PHY. “We are seeing significant interest and growing adoption of combo C-PHY/D-PHY support in customer designs,” said Ashraf Takla, Mixel’s President and CEO.  “Northwest Logic and Mixel have collaborated to provide a wide range of fully integrated and validated MIPI controller + PHY solutions.   These combined solutions have been used in more than 40 MIPI design with all tapeouts first time silicon successful,” said Brian Daellenbach, Northwest Logic’s President. Click here for details.

Northwest Logic’s GDDR6 Controller Core Now Available

Northwest Logic is now delivering evaluation versions of its GDDR6 Controller Core. This controller supports x32 and dual x16 GDDR6 channel configurations along with GDDR6 x16 and x8 clamshell modes.  It also supports advanced features including look ahead command processing and automated retry. The GDDR6 controller is part of the Northwest Logic’s full featured, modular memory interface solution.  It is delivered fully integrated and verified with the Rambus GDDR6 PHY. GDDR6 supports 60 GB/s transfer rates with a single device while utilizing proven BGA packaging.  GDDR6 provides a significant performance advantage over DDR4 enabling highly differentiated solutions for high-performance networking, autonomous vehicles, artificial intelligence and 5G infrastructure applications. Click here for more product information or to request an evaluation.

Microsemi is Utilizing Northwest Logic’s IP Cores in Many Products

Microsemi Corporation, a wholly owned subsidiary of Microchip Technology Inc. and a well-known global player for its semiconductor and system solutions, has been a longtime customer of Northwest Logic. Several of Microsemi’s market-leading storage solution products have utilized Northwest Logic’s PCI Express and Memory Controller Cores. “We have been pleased to be able to support Microsemi in its long line of compelling products,” said Brian Daellenbach, President of Northwest Logic. “Our relationship with Northwest Logic has been an extremely fruitful and solid one. The quality of its products and its level of support has been exceptional,” said Charlie Baron, Senior Manager of Product Development at Microsemi. Click here for more information on Northwest Logic’s Solutions.

GEO Deploys Mixel and Northwest Logic’s MIPI Solution in the World’s First Edge Based Automotive Smart Viewing Camera Processor

GEO Semiconductor, Inc. (“GEO”) has announced the GW5 Camera Video Processor (CVP) .  The GW5 is the world’s first edge based automotive smart viewing camera processor. The GW5 utilized Mixel’s MIPI® D-PHY^SM and Northwest Logic’s CSI-2^SM Tx Controller Core V2 to achieve first time silicon success in a 28nm node.  Mixel’s PHY IP has the widest process coverage in the industry having been silicon-proven at eight different nodes and eight foundries. Northwest Logic provides full featured, easy-to-use MIPI controller cores for CSI-2 and DSI-2/DSI.  The Mixel and Northwest Logic controllers are delivered as fully integrated and verified solution.  This solution has been used in more than 40 designs with all tapeouts first time silicon successful. Click here to request more information.

Northwest Logic’s Second Generation HBM2 Controller Core Now Available

Northwest Logic’s first generation HBM2 Controller Core (V1) is the HBM2 market leader with 19 HBM2 customer design wins, 7 test chips, and 100% first time tapeout silicon success. Northwest Logic’s second generation HBM2 Controller Core V2 heavily leverages the V1 core. The V2 core supports currently available HBM2 devices as well as future channel densities (6, 12, 16, 24 Gbits) and speeds (2.8, 3.2 Gbit/s/pin). In addition, the V2 core consumes 30% less silicon area compared to the V1 core. “We look forward to meeting the growing needs of data intensive memory applications with our second generation HBM2 Controller Core V2 solution”, said Brian Daellenbach, President of Northwest Logic. For more information about Northwest Logic’s HBM2 Controller Core V2, click here.

Northwest Logic and NetSpeed Partner to Boost Performance in Hyperscale and Automotive SoCs

Northwest Logic and NetSpeed have partnered to deliver high throughput memory subsystem solutions for customers designing SoCs for hyperscale and automotive applications. The combination of NetSpeed’s interconnect IP and Northwest Logic’s HBM2 and GDDR6 memory controllers provides a platform that enables end-to-end QoS (Quality of Service), resiliency and high performance.  “NetSpeed’s market leadership in the hyperscale and automotive segments is strengthened through our partnership with Northwest Logic,” said Anush Mohandass, VP of Marketing and Business Development at NetSpeed. “Our integration with Northwest Logic provides customers end-to-end QoS and end-to-end resiliency that is needed for next-gen applications.”   For more information about Northwest Logic’s memory controllers, click here.  To view the full NetSpeed press release, click here.

Aldec’s HES UltraScale+ Reconfigurable Accelerator and Northwest Logic’s PCI Solution

Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has used Aldec’s HES-XCVU9P-QDR UltraScale+ board with Northwest Logic’s Expresso 3.0 core for PCI Express® and AXI DMA Back-End Core to demonstrate a proven PCI Express solution which provides over 6 GB/s PCI Express throughput. “Several of our customers developing High-Performance Computing (HPC) applications such as those for High Frequency Trading (HFT) and Genome Alignment require easy to use PCIe core with a high throughput”, said Louie De Luna, Director of Marketing. “Northwest Logic’s Expresso 3.0 solution with high-performance scatter-gather DMA support is ideal for the various Endpoint, Root Port, Dual Mode and Switch use cases of our customers.” Click here for the full press release.

Northwest Logic Utilizes Avery Design’s Memory Models to Validate Its HBM2 and GDDR6 Controller Cores

Northwest Logic utilizes Avery Design’s full featured memory models to validate its memory controller cores including HBM2 and GDDR6. “Avery Design’s memory models are a key component in our overall memory controller validation strategy. Their models emulate the various memory devices available from the memory vendors. This enables the performance of various memory devices to be easily compared. In addition, Avery Design provides early releases of its models as the standards are evolving and responsive model support,” stated Brian Daellenbach, president of Northwest Logic. Please contact Northwest Logic or Avery Design for more information.

Northwest Logic Automates CDC and RDC Verification Using Questa CDC and Questa Reset Check

Northwest Logic uses Questa® CDC and Questa Reset Check during its core development and deliveries to comprehensively verify that its cores properly handle clock domain crossings (CDC) and reset domain crossings (RDC). To perform this verification efficiently and accurately, Northwest Logic has automated the process of utilizing Questa CDC and Questa Reset Check in its regression flow. This automation is accomplished using a script-based process to extract and configure the cores in Northwest Logic’s code repository and run CDC and RDC regression tests on them. “Northwest Logic’s verification environment utilizes a full suite of Questa tools to comprehensively and efficiently verify our controller cores,” said Brian Small, Infrastructure lead, Northwest Logic. To view the full CDC/RDC automation success story please follow this link.

Northwest Logic Will Be Participating in the Samsung Foundry Forum

Northwest Logic, a Samsung HBM Ecosystem Partner (see white paper), will be participating in the Samsung Foundry Forum on May 22, 2018 at the Santa Clara Marriott. Northwest Logic’s market leading HBM2 Controller Core is available for use in Samsung Foundry’s advanced process nodes. “Our collaboration with Samsung ensures that our customers achieve the highest possible system performance when using the combination of Northwest Logic’s HBM2 Controller IP and Samsung’s HBM2 devices,” said Brian Daellenbach, President at Northwest Logic. Please stop by Northwest Logic’s kiosk to learn about Northwest Logic’s HBM2 and other controller cores for your next Samsung Foundry design.

Northwest Logic Will be at Design Automation Conference (DAC) 2018

Northwest Logic will be at DAC 2018 in San Francisco, June 26th and 27th. Please contact us if you are going to be at DAC and would like to have a face-to-face meeting to discuss our latest Memory, PCIe or MIPI IP products and roadmap. We will also be periodically present in several partners’ booths including Mixel (Booth #1323) and Analog Bits (Booth #1652).

Northwest Logic, Micron, Rambus and Avery Design to Deliver a Comprehensive GDDR6 Solution for Next-Generation Applications

Northwest Logic is collaborating with Micron, Rambus and Avery Design to deliver a comprehensive GDDR6 solution. This first-of-its-kind solution will extend GDDR6’s use beyond the traditional graphics market into advanced applications such as high-performance networking, autonomous vehicles, artificial intelligence and 5G infrastructure. Supporting up to 64GB/s transfer rates with a single device, GDDR6 provides a significant performance advantage over DDR4 while utilizing proven BGA packaging.

The GDDR6 solution will include the following components:
• GDDR6 Memory (Micron)
• GDDR6 PHY (Rambus)
• GDDR6 Controller (Northwest Logic)
• GDDR6 Verification IP (Avery Design)

“Northwest Logic is adapting its widely used, silicon-proven Memory Controller solution to support GDDR6 memory. The high-performance, fully configurable GDDR6 Controller will be fully integrated, verified and delivered with the Rambus GDDR6 PHY enabling customer to quickly and reliably create GDDR6 designs,” said Brian Daellenbach, president of Northwest Logic. For the full press release, click here. For more information about Northwest Logic’s GDDR6 Controller Core, click here.

Samsung’s HBM2 Ecosystem Includes Northwest Logic’s HBM2 Controller Core

Samsung has created a whitepaper describing their HBM Technology Partnership Ecosystem. Click here to download the whitepaper. In December 2018, Samsung Memory and Foundry, ASE, eSilicon, Rambus and Northwest Logic hosted seminars in Tokyo and Shanghai showcasing their complete HBM2 solution. Northwest Logic’s high-performance, highly configurable HBM2 Controller Core is the market leader having been used in 18 designs. “Samsung’s HBM2 devices are the clear market choice for performance and availability. We are pleased to work closely with Samsung to meet the needs of our mutual HBM2 customers,” said Brian Daellenbach, President of Northwest Logic. Click here for more information on Northwest Logic’s Memory solutions.

ASICs Unlock Deep Learning Innovation: Live Seminar in Silicon Valley

Please join Samsung Electronics, Amkor Technology, eSilicon Corporation, and Northwest Logic as we present a complete implementation platform for deep learning ASICs. There is no charge to attend this live deep learning seminar and networking event.
This seminar has concluded.  

Northwest Logic and Analog Bits Provide a Complete PCI Express® (PCIe®) 4.0 Solution

Northwest Logic and Analog Bits have collaborated to provide a complete PCI Express 4.0 Controller and PHY solution including 16G support. This fully integrated solution utilizes Analog Bits high-performance, low-power SERDES and Northwest Logic’s high-performance, full-featured Expresso 4.0 Controller Core. This PCIe 4.0 solution supports bifurcated 16/8/4/2/1 lane operation at 16/8/5/2.5 Gbit/s line rates and is already being used in multiple 16G PCIe ASIC designs. “We are very pleased about the customer benefits that this PHY plus controller partnership delivers,” said Mahesh Tirupattur, Executive VP of Analog Bits. “Northwest Logic’s PCIe 4.0 controller and DMA solution is delivered fully integrated with the Analog Bits’ PHY to enable customers to confidently and quickly create PCIe 4.0 based designs,” added Vinitha Seevaratnam, PCI Express Product Marketing Engineer. Contact Northwest Logic or Analog Bits for more information.

b-plus Expands Advanced Driver Assistance System Product Offering with Northwest Logic’s MIPI CSI-2 Controller Cores

b-plus, with 20 years of industry experience, is a specialist in the development and integration of electronic systems including Advanced Driver Assistance Systems (ADAS) development and verification components. As the automobile industry quickly adopts CSI-2 based sensors, b-plus is now offering CSI-2 based solutions for measuring and simulation/replay of raw sensor data. These products provide ADAS design teams earlier access to valuable sensor data that can be used for algorithm development or early software development. “We are using the Northwest Logic CSI-2 Rx and CSI-2 Tx Controller Cores for our Measurement Data Interface MDILink and our Hardware in the Loop System b-HiL development systems. Northwest Logic’s high-quality CSI-2 Controller cores were easy to deploy and enabled us to very quickly focus on our automotive product features,” said Adrian Bertl, Product Marketing at b-plus. Please contact Northwest Logic for more information.

Northwest Logic and Fidus Systems showcase a proven PCIe Gen 4 platform for developing 16G solutions

Northwest Logic and Fidus Systems announced that Northwest Logic’s PCI Express® (PCIe®) 4.0 solution, which includes the Expresso 4.0 Core (PCI Express 4.0 controller) and a variety of full-featured PCI Express DMA cores, has been validated on the Fidus Sidewinder-100 platform. This validation was done with 4 lanes running at 16 Gbit/sec SERDES rates. This joint validation effort provides customers with a proven PCIe Gen 4 platform for developing 16G solutions. “The PCI Express 4.0 Solution was hardware tested at 16G rates utilizing the Fidus Sidewinder and the Xilinx Kintex UltraScale+ GTY board in a switch application. The Fidus Sidewinder board was a key component in this testing,” said Vinitha Seevaratnam, PCI Express Product Marketing Engineer at Northwest Logic. “Our successful PCI SIG FYI compliance testing further verifies that Northwest Logic’s PCI Express 4.0 Solution provides a robust and proven platform for developing PCI Express 4.0/3.1/2.1/1.1 based products.” Click here for the full press release.