Memory + Interfaces

GDDR6 PHY

Designed for performance and power efficiency, the GDDR6 PHY enables big data analytics, crypto mining, ADAS, AI, machine learning, and deep learning.

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Product Brief

GDDR6 PHY Subsystem Example

How GDDR6 PHY works

The Rambus GDDR6 (Graphics Double Data Rate) Memory PHY enables the communication to and from high-speed, high-bandwidth GDDR6 SGRAM (Synchronous Graphics Random Access) memory. Originally designed for graphics applications, GDDR6 is a high-performance memory solution that can be used in a variety of high-performance applications that require large amounts of data computation like artificial intelligence (AI), crypto mining, deep learning, autonomous vehicles, and high-speed networking.

The Rambus GDDR6 PHY will be fully compliant to the JEDEC GDDR6 (JESD250) standard, supporting up to 16 Gbps per pin. The GDDR6 interface supports 2 channels, each with 16 bits for a total data width of 32 bits. With Speeds up to 16 Gbps per pin the Rambus GDDR6 PHY will offer a maximum bandwidth of up to 64 GB/s. This PHY will be available in advanced FinFET nodes for leading-edge customer integration. The Rambus system-aware design methodology used for IP Cores delivers a customer focused experience with improved time-to-market and first-time-right quality. Rambus offers flexible delivery of IP cores and will work directly with the customer to provide a full system signal and power integrity analysis, creating an optimized chip layout. In the end, the customer receives a hard macro solution with a full suite of test software for quick turn-on, characterization and debug.

Going Beyond GPUs with GDDR6

GDDR6 offers higher densities compared to previous-generation graphics memory. In addition, GDDR6 doubles the speed (12–16 Gb/s) of GDDR5 and provides more than 5X the 3.2 Gb/s speed of DDR4. Moreover, GDDR6 supports the same low external voltage (1.35V) as GDDR5X, although it is based on a dual-channel architecture instead of GDDR5X’s single-channel architecture. With initial shipments beginning in 2018, GDDR6 will be deployed across multiple verticals, including the graphics market, the data center/networking space and automotive sector.

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Solution Offerings

The Rambus GDDR6 PHY IP Core

The JEDEC-compliant Rambus GDDR6 PHY IP Core is optimized for systems that require low-latency and high-bandwidth GDDR6 memory solutions. Available on leading FinFET process nodes, the PHY interface supports two independent channels, with each supporting 16 bits for a total data width of 32 bits. In addition, the PHY supports speeds up to 16Gbps per pin, providing a maximum bandwidth of up to 64 GB/s.

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Related Markets & Applications

Data Center