At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
DDR5 Temperature Sensor Chip
The Rambus DDR5 Temperature Sensor (TS5110) enables DDR5 Registered DIMMs (RDIMMs), Load Reduced DIMMs (LRDIMMs) and Non-Volatile DIMMs (NVDIMMs) for servers, workstations and storage systems.
| Description | Part Number | Product Brief | Applications | Status |
|---|---|---|---|---|
| Temperature Sensor | TS5110-G1B |  |
Server RDIMM, NVDIMM | In Production |
How the DDR5 Temperature Sensor Works
The DDR5 Temperature Sensor device incorporates thermal sensing capability which is controlled and read over I2C and I3C Basic bus serial interface. The TS5 device operates from 1.8V nominal power supply input. The TS5 device is intended to operate up to 12.5 MHz on a 1.0V to 1.2V I3C Basic bus or up to 1 MHz on a 1.0V to 1.2V I2C bus.
The TS5 device is intended to interface to I2C/I3C Basic buses which have multiple devices on a shared bus and must be uniquely addressed with fixed addressing on the same bus. The TS5 device responds to specific pre-defined I2C/I3C Basic device select codes on the serial interface bus.
Features of the DDR5 Temperature Sensor
- I2C and I3C Basic bus serial interface support
- Meets or exceeds all JESD302-1 performance specifications up to 1MHz for I2C and 12.5MHz for I3C Basic bus serial interface
- Thermal sensing capability
- 6-ball WLCSP package, MO-229 var V/W/ECED-3; 0.8 mm x 1.3 mm
- Parity error check and packet error check (PEC) function
- In-band Interrupt (IBI) support
- Operational at 1.8V +10%/- 5%
- I2C and I3C Basic bus operational at 1.0V, 1.1V, and 1.2V nominal I/O levels
- Dynamic driver switching capability for I3C Basic bus operation between push-pull and open-drain
- Meets or exceeds all JEDEC Temperature Sensor Device operational requirements
- Precision thermal sensing
- I2C and I3C bus serial interface support
- Low latency for fastest I3C bus rates
- Meets or exceeds all JEDEC DDR5 Temperature Sensor operational requirements (JESD302-1.01)
Data Center Evolution: DDR5 DIMMs Advance Server Performance
Driven by a confluence of megatrends, global data traffic is increasing at an exponential rate. For example, 5G networks are enabling billions of AI-powered IoT devices untethered from wired networks. Nowhere is the impact of all this growth being felt more intensely than in data centers. Indeed, hyperscale data centers have become the critical hubs of the global data network. DDR5 DRAM will enable the next generation of server systems providing the massive computing power of hyperscale and enterprise data centers. Learn about the benefits of DDR5 memory and the design considerations for implementing DDR5 DIMMs.
