The PLDA PCIe 5.0 controller core is designed for maximum performance and ease of use for PCI Express (PCIe) 5.0 applications. It comprises a complete SerDes subsystem with the Rambus PCIe 5.0 PHY or can integrate with PIPE 5.x-compliant 3rd-party PHYs. The controller is backwards compatible with PCIe 5.0, 4.0, and 3.1/3.0.
PCIe 5.0 Controller Product Brief
INSPECTOR for PCIe 5.0 Product Brief
Interposer Card for Diagnostic Testing, Exercising and Debug of PCIe Devices at up to Gen5 32 GT/s speed.
Gen5ENDPOINT Product Brief
PCIe 5.0 Endpoint Reference Platform for Prototyping and Development of PCIe 5.0 Root Port/Host Silicon and Devices.
Gen5HOST Product Brief
PCIe 5.0 Host Enabling Reference Platform for Prototyping & Development of PCIe 5.0 Devices and Applications.
CCIX 1.1 Controller Product Brief
The PLDA CCIX 1.1 Controller supports the PCI Express 5.0, 4.0 and 3.1/3.0 specifications, as well as with version 4.x and 5.x of the PHY Interface for PCI Express (PIPE) specification, and supports the CCIX Extended Speed Mode as defined in the CCIX Base Specification Revision 1.1.
PCIe Controller for USB4 with AXI Product Brief
The PLDA PCIe Controller for USB4 with AXI supports the PCIe 5.0 specification, and implements the required features mandated by the USB4 Specification. The controller can be configured to support endpoint, root port, switch port, and dual-mode topologies, allowing for a variety of use models.
