Rapidly evolving workloads and exploding data volumes place great pressure on data-center compute, IO, and memory performance, and especially on memory capacity. Increasing memory capacity requires a commensurate reduction in memory cost per bit. DRAM technology scaling has been steadily delivering affordable capacity increases, but DRAM scaling is rapidly reaching physical limits. Other technologies such as Flash, enhanced Flash, Phase Change Memory, and Spin Torque Transfer Magnetic RAM hold promise for creating high capacity memories at lower cost per bit. However, these technologies have attributes that require careful management.
Cryogenic, superconducting digital processors offer the promise of greatly reduced operating power for server-class computing systems. This is due to the exceptionally low energy per operation of Single Flux Quantum circuits built from Josephson junction devices operating at the temperature of 4 Kelvin. Unfortunately, no suitable same-temperature memory technology yet exists to complement these SFQ logic technologies. Possible memory technologies are in the early stages of development but will take years to reach the cost per bit and capacity capabilities of current semiconductor memory. We discuss the pros and cons of four alternative memory architectures that could be coupled to SFQ-based processors. Our feasibility studies indicate that cold memories built from CMOS DRAM and operating at 77K can support superconducting processors at low cost-per-bit, and that they can do so today.
For buildings and homes to become ‘smarter’ and more adaptive, new sensing technology must be capable of detecting, counting and tracking occupants regardless of motion. While next-generation sensor technology offers a glimpse of an exciting future in which buildings adapt and learn, real-world privacy issues will almost certainly have to be addressed before mainstream adoption is achieved.
Although focused cameras may adequately address sensing requirements, they also present a range of legal, privacy and hacking risks. These legal and technical issues, coupled with public distrust of lenses, will likely result in a limited deployment of focused cameras for room occupancy sensing tasks in offices and residences. And while defocused cameras offer certain limited advantages over their focused counterparts, images produced by such devices may be easily refocused.
In contrast, Rambus’ lensless smart sensor (LSS) technology reduces occupancy sensing privacy concerns by capturing the raw data of a scene with a diffractive grating, rather than a recognizable image with a lens. Put simply, LSS does not capture focused images or purposely de-focused images. Instead, the technology creates what is called the ‘blob’ domain, which is a series of point spread functions (PSF) of light. This unique ability makes LSS an ideal choice for widespread deployment in smart buildings.
Note: LSS is no longer being marketed as a product, though Rambus maintains ownership of the IP created in the LSS program.
As an industry, if real progress is to be made towards the level of computing that the future mandates, then the way computing problems are attacked must change. The von Neumann execution model has and will continue to serve us well, but additional techniques must be brought to bear.
The next logical focus area is data—how it is accessed, and how it is transformed into real information—that leads to newer solutions. No longer can all of memory simply continue to be an element that holds the program commands and data during execution. Memory must become an active part of the solution, rather than a necessary evil.
The first step in what is likely to be a protracted journey is to provide a vehicle that allows it to be exploited independently of the CPU. Rambus is doing just that through the creation of their Smart Data Acceleration (SDA) Research Program.