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HBM2E Selection and Implementation
https://go.rambus.com/hbm2e-selection-and-implementation-webinar#new_tabHBM2E DRAM is the latest generation of high bandwidth memory enabling the most advanced AI accelerators and HPC solutions. In this webinar, Rambus technology experts Frank Ferro and Joe Rodriguez discuss the selection and implementation considerations for HBM2E memory solutions. The silicon-proven Rambus interface solution consisting of integrated PHY and memory controller is covered.
GDDR6 Selection and Implementation
https://go.rambus.com/gddr6-selection-and-implementation-webinar#new_tabGDDR6 memory provides the high bandwidth needed by a growing range of applications from graphics cards to AI/ML inferencing. In this webinar, Rambus technology experts Frank Ferro and Joe Rodriguez discuss the selection and implementation considerations for GDDR6 memory solutions. The silicon-proven Rambus interface solution consisting of integrated PHY and memory controller is covered.
AI Requires Tailored DRAM Solutions: Part 4
https://www.rambus.com/blogs/ai-requires-tailored-dram-solutions-part-4/Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part three of this four-part series touched on a wide range of topics including the impact of AI on specific hardware systems, training […]
The world’s first DDR5 DRAM has been developed, here’s what it looks like
https://www.criticalhit.net/technology/the-worlds-first-ddr5-dram-has-been-developed-heres-what-it-looks-like/#new_tabSpecial things come to those who wait. And for those who have believed that that the speed of computer memory would double with DDR5, their patience has paid off since this new technological leap was announced almost three years ago.
World’s first DDR5 DRAM module has focus on power
https://www.eenewspower.com/news/worlds-first-ddr5-dram-module-has-focus-power#new_tabSK hynix is launching the world’s first DDR5 memory module, aimed at Big Data, Artificial Intelligence (AI), and machine learning (ML) with a key focus on power consumption. The DDR5 memory module is supports transfer rate of 4.8 to 5.6Gbit/s, 1.8 times faster than the previous generation, at 1.1V rather than 1.2V. This reduces the […]
SK Hynix Launches World’s First DDR5 DRAM Modules Rated At 4.8 Gbps And Beyond
https://hothardware.com/news/sk-hynix-launches-worlds-first-ddr5-dram-modules#new_tabBack in July, JEDEC finalized the specifications for DDR5 memory, and laid out a number of key performance advantages over DDR4 including quadrupling the maximum die density to 64Gb and boosting maximum data rates from 3.2Gbps to 6.4Gbps [official]. Today, SK Hynix has announced that it is launching the world’s very first DDR5 DRAM chips.
AI Requires Tailored DRAM Solutions: Part 3
https://www.rambus.com/blogs/ai-requires-tailored-dram-solutions-part-3/Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part two of this four-part series touched on multiple topics including how AI enables useful data processing, various types of AI silicon, and […]
AI Requires Tailored DRAM Solutions: Part 2
https://www.rambus.com/blogs/ai-requires-tailored-dram-solutions-part-2/Written by Rambus Press Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part one of this four-part series reviewed a range of topics including the interconnected system landscape, the impact of […]
Rambus Demonstrates HBM2E Running at 4 Gbps: 512 GB/s per HBM2E Stack
https://www.tomshardware.com/news/rambus-demonstrates-hbm2e-running-at-4-gbps-512-gbs-per-hbm2e-stack#new_tabRambus has demonstrated that its HBM2E solution, which consists of a memory controller and a verified 1024-bit PHY, can operate at a whopping 4.0 Gbps data transfer rate per pin. The demonstration is meant to prove potential clients that the HBM2E solution can scale and offer a 25% higher peak bandwidth than is officially defined by JEDEC’s […]
AI Requires Tailored DRAM Solutions: Part 1
https://www.rambus.com/blogs/ai-requires-tailored-dram-solutions-part-1/Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. In part one of this four-part series, Ferro and Rau discuss a wide range of topics including the interconnected system landscape, the impact […]