At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
Found 221 Results
Looking beyond Dennard Scaling
https://www.rambus.com/blogs/looking-beyond-dennard-scaling-2/Robert H. Dennard co-authored his now-famous paper for the IEEE Journal of Solid State Circuits way back in 1974. Essentially, Dennard and his engineering colleagues observed that as transistors are reduced in size, their power density stays constant. Meaning, power use stays in proportion with area, as both voltage and current scale (downward) with length. […]
The end of payments as we know it
https://www.rambus.com/blogs/the-end-of-payments-as-we-know-it/Money 20/20 is over for another year. And as sore feet (and heads) recover and the dust starts to settle, attention is turning to the big trends and key themes. The show has always been focused on the future and this year’s installment was no different. In particular, there was much to make retailers sit […]
Let’s talk about Money 20/20
https://www.rambus.com/blogs/lets-talk-about-money-2020-2/Billed as the world’s largest payment and financial services event, Money 20/20 kicks off in Las Vegas on October 23rd. The Rambus team will be at booth 2525 in the Venetian Hotel, discussing all things mobile payments and tokenization, including newly announced products to simplify the deployment of NFC services “Mobile payments are revolutionizing the […]
What to Expect at Money 20/20?
https://www.rambus.com/blogs/what-to-expect-at-money-2020/It’s back! Money 20/20 is just around the corner and it promises to be bigger and bolder than ever. With excitement building and speculation rife, we predict some of the key trends likely to be shaping the conversation at this year’s installment. Securing Mobile Payments Over the past year, tokenization has further strengthened its position […]
Maximizing Von Neumann architecture
https://www.rambus.com/blogs/maximizing-von-neumann-architecture-2/In 1945, mathematician and physicist John von Neumann described a design architecture for an electronic digital computer in the First Draft of a Report on the EDVAC. Also known as the Princeton architecture, the design included a processing unit with an arithmetic logic unit and processor registers; a control unit containing an instruction register and […]
Eyeing the future of smart cities
https://www.rambus.com/blogs/eyeing-the-future-of-smart-cities-2/Rambus principal research scientist Patrick Gill recently penned an article for Telecoms Tech about how lensless smart sensors (LSS) can potentially play an important role in building future smart cities. As Gill notes, LSS technology offers a fundamentally new approach to visual sensing by shifting the function of traditional optics to computation, thereby eliminating the […]
Managing memory more efficiently with Milk
https://www.rambus.com/blogs/managing-memory-more-efficiently-with-milk-2/Researchers from MIT’s Computer Science and Artificial Intelligence Laboratory (CSAIL) have introduced a programming language extension known as Milk that allows app developers to manage memory more efficiently in programs with scattered data points in large data sets. To be sure, fetching data from memory banks is currently a major performance bottleneck, with cores grabbing […]
The role of FPGA acceleration in the data center and beyond
https://www.rambus.com/blogs/the-role-of-fpga-acceleration-in-the-data-center-and-beyond-2/The International Conference on Field-Programmable Logic and Applications recently convened in Lausanne, Switzerland. As Christoforos Kachris, a senior researcher at the National Technical University of Athens notes, exploring the role of FPGAs in the data center took center stage at the conference. “Christoph Hagleitne presented IBM’s view of the major applications where FPGAs can provide […]
Accelerating high performance computing systems
https://www.rambus.com/blogs/accelerating-high-performance-computing-systems-2/Esthela Gallardo and Patricia J. Teller have penned an article for HPC Wire that explores the various challenges associated with cross-accelerator performance profiling. As Gallardo and Teller note, high performance computing (HPC) systems are comprised of multiple compute nodes interconnected by a network. “Previously these nodes were composed solely of multi-core processors, but nowadays they also […]
Exploring future memory requirements for quantum computing
https://www.rambus.com/blogs/exploring-future-memory-requirements-for-quantum-computing-2/Quantum computing utilizes quantum-mechanical phenomena, including superposition and entanglement, to perform operations on data. According to Wikipedia, quantum computers differ from traditional binary digital electronic systems based on transistors. To be sure, digital computing encodes data into binary digits (bits), each of which is always in one or two definite states: 0 or 1. In […]
