Found 79 Results

VESA Display Stream Compression (DSC): The Complete Guide

Learn everything you need to know about VESA Display Stream Compression (DSC), simply explained in our blog. Start reading! Display technology has advanced in leaps and bounds over the past decade. Electronics manufacturers have been using increasingly sophisticated display features as a way of differentiating their products in the highly competitive consumer electronics market. Each […]

PCIe 6.0 SerDes PHY

Interface IP PCIe 6.0 SerDes PHY The Rambus PCI Express® (PCIe®) 6.0 PHY is a low-power, area-optimized, silicon IP core designed with a system-oriented approach to maximize flexibility and ease of integration. It delivers up to 64 GT/s signaling rates in performance-intensive applications for artificial intelligence (AI), data center, edge, networking, and HPC. The PCIe […]

PCI Express Glossary​

PCI Express Glossary a | b | c | d | e | f | g | h | i | j | k | l | m | n | o | p | q | r | s | t | u | v | w | x | y | z A ACS […]

PCIe 6.0 Retimer Controller with CXL Support

Interface IP PCIe 6.0 Retimer Controller with CXL Support PCI Express® (PCIe®) 6.0 links operating at 64 GT/s using PAM4 signaling have a reach of up to 13 inches at nominal conditions on standard PCBs. Extending trace routing beyond this distance results in higher first bit error rates (FBER) and reduced link efficiency due to […]

Rambus Design Summit

Virtual | July 19, 2022 Watch On-demand About Rambus Design Summit Back for its third year, the Rambus Design Summit is a virtual conference focused on the selection and implementation of chip and IP solutions for the data center, edge, automotive and IoT devices including the acceleration and security of AI/ML applications. Hear our technology […]

Video Compression and Forward Error Correction Cores

Interface IP Video Compression and Forward Error Correction Cores Rambus visually lossless video compression and FEC IP cores (formerly from Hardent) enable designers to handle the growing bandwidth requirements of cutting-edge displays with higher resolutions, faster refresh rates, and greater pixel depths. We offer a range of high-quality solutions designed to support the latest video […]

XpressAGENT™ Add-on Module

Interface IP XpressAGENT™ Add-on Module Rambus XpressAGENT is a chip-level solution designed for simplifying observability and expediting debug of PCI Express® (PCIe®) and Compute Express Link™ (CXL™) based subsystems that utilize Rambus PCIe or CXL controllers with any PCIe or CXL PHY. ContactProduct Brief How the XpressAGENT™ Add-on Module works The XpressAGENT Add-on Module provides […]

AI Accelerates HBM Momentum

In a recent EE Times article, Gary Hilson notes that high bandwidth memory (HBM) deployments are becoming more mainstream due to the massive growth and diversity in artificial intelligence (AI) applications. “HBM is [now] less than niche. It’s even become less expensive, but it’s still a premium memory and requires expertise to implement,” writes Hilson. […]

How Rambus is Making Data Faster and Safer in 2022 and Beyond

Throughout 2021 and early 2022, Rambus has continued to make data faster and safer with the launch of key products, industry initiatives, and strategic partnerships. To address the insatiable demand for more bandwidth in the data center, we announced our 8.4 Gbps HBM3-Ready Memory Subsystem, confirmed the sampling of our DDR5 5600 MT/s 2nd-generation RCD chip, demonstrated our PCI Express® (PCIe) 5.0 digital controller IP on leading FPGA platforms, and unveiled our CXL Memory Interconnect Initiative. Looking ahead to 2022 and beyond, these products, initiatives, and partnerships will help power the […]

Data Center Evolution: The Leap to 64 GT/s Signaling with PCI Express 6.0

The PCI Express® (PCIe®) interface is the critical backbone that moves data at high bandwidth and low latency between various compute nodes such as CPUs, GPUs, FPGAs, and workload-specific accelerators. With the torrid rise in bandwidth demands of advanced workloads such as AI/ML training, PCIe 6.0 jumps signaling to 64 GT/s with some of the […]