Found 212 Results

The system bottlenecks of Moore’s Law

https://www.rambus.com/blogs/the-system-bottlenecks-of-moores-law-2/

Ed Sperling of Semiconductor Engineering recently noted that rightsizing chip architecture has become more complex in recent years. Essentially, rightsizing is a method of targeting chips to specific application needs – ensuring sufficient performance, while minimizing power and cost. “[Rightsizing] has been a topic of conversation across the semiconductor industry for years because as power […]

SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems Announce New HBM White Paper: “Start Your HBM/2.5D Design Today”

https://www.rambus.com/new-hbm-white-paper/

                       White paper explains a real, working HBM/2.5D supply chain San Jose, California — April 19, 2016 — SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have co-authored a white paper discussing High Bandwidth Memory (HBM) designs implemented with 2.5D technology. HBM is […]

Start Your HBM/2.5D Design Today

https://www.rambus.com/start-your-hbm-2-5d-design-today/

SK hynix, Inc., Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to interconnect a SoC and a HBM memory stack. To learn more about the Rambus HBM2E Controller, click here.

Toshiba Announces Immediate IP Subsystem Availability of PCI Express® and DDR3 for Custom LSI Platforms

https://www.rambus.com/toshiba-announces-immediate-ip-subsystem-availability-of-pci-express/

May 31, 2016 TOKYO– Toshiba Corporation’s (TOKYO: 6502) Storage & Device Solutions Company announced today the immediate availability of PCI Express *1 and DDR3 SDRAM *2 IP subsystems *3 developed in conjunction with Northwest Logic, a leading provider of high-performance, easy-to-use, silicon-proven PCI Express and Memory Interface IP cores. These subsystems are available on custom […]

Architecting new memory for the IoT

https://www.rambus.com/blogs/architecting-new-memory-iot/

The once indefatigable Moore’s Law is beginning to slow, even as data, driven by a burgeoning Internet of Things (IoT), continues to increase exponentially. Consequently, a slew of new memory architectures, including those utilizing 2.5D and 3D packaging, are evolving to meet the demands of a new digital age. Nevertheless, As Ed Sperling of Semiconductor […]

Controllers Newsletter – Q1 2016

https://www.rambus.com/controllers-newsletter-q1-2016/

CSI-2 Controller Core V2 Now Available Northwest Logic has released its second generation CSI-2 Controller Core V2. This core utilizes a 64-bit core width to support the fastest D-PHY and C-PHY data rates available now and anticipated in the future at controller clock frequencies which are easy to close timing. This core fully supports the […]

SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems Announce “Start your HBM/2.5D Design Today” Webinar

https://www.rambus.com/hbm-webinar/

                       Webinar will bring content from recent seminar to a worldwide audience San Jose, California — March 15, 2016 — SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems recently presented a live seminar in the Bay Area discussing High Bandwidth Memory (HBM) […]

SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems Announce “Start your HBM/2.5D Design Today” Seminar

https://www.rambus.com/hbm-complete-supply-chain-solution/

                       San Jose, California — February 4, 2016 – SK hynix, (“SK hynix”), Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to […]

Northwest Logic Uses Avery Design System’s High Bandwidth Memory (HBM) Model to Verify Its High-Performance HBM Controller IP Core

https://www.rambus.com/northwest-logic-uses-avery-design-systems-high-bandwidth-memory-hbm-model-verify-high-performance-hbm-controller-ip-core/

TEWKSBURY, MA, November 10, 2015 – Northwest Logic Inc, a leader in high-performance digital IP Cores and Avery Design Systems, a leader in Verification IP (VIP) solutions, today announced that Northwest’s High Bandwidth Memory (HBM) Controller Core has been verified utilizing Avery’s HBM memory model.  In addition, Northwest Logic is using Avery DIMM and component memory […]

The 3MB of RAM in William Gibson’s Neuromancer

https://www.rambus.com/blogs/mid-the-3mb-of-ram-in-william-gibsons-neuromancer/

Neuromancer, a 1984 cyberpunk novel by William Gibson, was the first winner of the science fiction triple crown: the Nebula Award, the Philip K. Dick Award and the Hugo Award. Marking the beginning of the Sprawl trilogy, the book tells the story of Case, a washed-up computer hacker hired by an enigmatic employer. According to […]

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