Found 388 Results

Rambus Expands High-Performance Memory Subsystem Offerings with HBM2E Solution on Samsung 14/11nm

https://www.rambus.com/rambus-expands-high-performance-memory-subsystem-offerings-with-hbm2e-solution-on-samsung-14-11nm/

Highlights:  Supports accelerators requiring terabyte-scale bandwidth for artificial intelligence/machine learning (AI/ML) training applications Fully-integrated HBM2E memory interface subsystem, consisting of verified PHY and controller, silicon proven on advanced Samsung 14/11nm FinFET process Backed by unrivaled system expertise supporting customers with interposer and package reference designs to speed time to market SAN JOSE, Calif. – April 21, 2021 – Rambus […]

Rambus Joins DARPA Toolbox Initiative with State-of-the-Art Security and Interface IP

https://www.rambus.com/rambus-joins-darpa-toolbox-initiative-with-state-of-the-art-security-and-interface-ip/

Highlights:  Agreement makes Rambus Root of Trust, Secure Protocol Engines, along with Memory and SerDes PHYs and Controllers available to DARPA researchers Streamlined access to cutting-edge silicon IP accelerates forward-looking innovation DARPA researchers will be able to leverage industry-leading capabilities and expertise from Rambus SAN JOSE, Calif. – April 14, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of […]

HBM2E targets AI/ML training

https://www.rambus.com/blogs/hbm2e-targets-ai-ml-training/

Frank Ferro, Senior Director Product Management at Rambus, has written a detailed article for Semiconductor Engineering that explains why HBM2E is a perfect fit for Artificial Intelligence/Machine Learning (AI/ML) training. As Ferro points out, AI/ML growth and development are proceeding at a lighting pace. Indeed, AI training capabilities have jumped by a factor of 300,000 […]

Rambus Tech Days

https://www.rambus.com/rambus-tech-days/

Rambus Tech Days April 19 – 21, 2021 Register Today Rambus Tech Days are three afternoons of deep dive technical presentations covering topics from MACsec to MIPI. Join security and interface technology leaders from Rambus and its partners as they discuss the latest solutions for safeguarding and accelerating data in applications spanning AI/ML, data center, […]

How PCIe 5 Can Accelerate AI and ML Applications

https://www.rambus.com/blogs/how-pcie-5-can-accelerate-ai-and-ml-applications/

Rambus’ Suresh Andani has written a detailed Semiconductor Engineering article that explores how PCIe 5 can effectively accelerate AI and ML applications. According to Andani, the rapid adoption of sophisticated artificial intelligence/machine learning (AI/ML) applications and the shift to cloud-based workloads has significantly increased network traffic in recent years. However, the paradigm of virtualization can […]

Three Top Semiconductor Tech Trends for 2021

https://www.rambus.com/blogs/three-top-semiconductor-tech-trends-for-2021/

As a momentous 2020 fades into the history books, 2021 is expected to be a year of growth and evolution for the semiconductor industry across multiple market segments. Firstly, DDR5 DRAM is slated to enter volume production by the end of 2021, with initial deployments targeting hyperscale data centers. Secondly, AI/ML neural networks – which […]

The Ultimate Guide to HBM2E Implementation & Selection

https://www.rambus.com/blogs/hbm2e/

This is the most comprehensive guide to selecting and implementing a HBM2E memory IP interface solution. Frank Ferro and Joseph Rodriguez, Senior Directors Product Management at Rambus, hosted a webinar at our Rambus Design Summit discussing HBM2 and HBM2E memory technology. There’s a lot of decisions that need to be made when you’re developing high […]

HBM2E Selection and Implementation

https://go.rambus.com/hbm2e-selection-and-implementation-webinar#new_tab

HBM2E DRAM is the latest generation of high bandwidth memory enabling the most advanced AI accelerators and HPC solutions. In this webinar, Rambus technology experts Frank Ferro and Joe Rodriguez discuss the selection and implementation considerations for HBM2E memory solutions. The silicon-proven Rambus interface solution consisting of integrated PHY and memory controller is covered.

GDDR6 Selection and Implementation

https://go.rambus.com/gddr6-selection-and-implementation-webinar#new_tab

GDDR6 memory provides the high bandwidth needed by a growing range of applications from graphics cards to AI/ML inferencing. In this webinar, Rambus technology experts Frank Ferro and Joe Rodriguez discuss the selection and implementation considerations for GDDR6 memory solutions. The silicon-proven Rambus interface solution consisting of integrated PHY and memory controller is covered.

AI Requires Tailored DRAM Solutions: Part 4

https://www.rambus.com/blogs/ai-requires-tailored-dram-solutions-part-4/

Frank Ferro, Senior Director Product Management at Rambus, and Shane Rau, Senior Research Executive at IDC, recently hosted a webinar that explores the role of tailored DRAM solutions in advancing artificial intelligence. Part three of this four-part series touched on a wide range of topics including the impact of AI on specific hardware systems, training […]

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