At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
Found 388 Results
CCIX 1.1 Controller
https://www.rambus.com/interface-ip/cxl/ccix1-controller/CCIX 1.1 Controller Contact Us The CCIX 1.1 Controller (formerly XpressCCIX) is a configurable and scalable PCIe controller IP designed for ASIC and FPGA implementations. There is also a CCIX 1.1 Controller with AXI version (formerly XpressCCIX-AXI) with support for the AMBA AXI protocol specification. ContactProduct Briefs CCIX 1.1 CCIX 1.1 with AXI How the […]
PCIe 6.0 Controller
https://www.rambus.com/interface-ip/pci-express/pcie6-controller/PCIe 6.1 Controller Contact Us The PCI Express® (PCIe®) 6.1 Controller is configurable and scalable controller IP designed for ASIC implementation. The controller supports the PCIe 6.1 specification, including 64 GT/s data rates, PAM4 signaling, FLIT mode, and L0p power state. The PCIe 6.1 architecture will be essential for SoC designers creating next-generation chips that […]
PCIe 5.0 Multi-port Switch
https://www.rambus.com/interface-ip/pci-express/pcie5-multi-port-switch/PCIe 5.0 Multi-port Switch Contact Us The PCIe 5.0 Multi-port Switch (formerly XpressSWITCH) is a customizable, multiport embedded Switch for PCIe designed for ASIC and FPGA implementations enabling the connection of one upstream port and up to 31 downstream ports. ContactProduct Brief How the PCIe 5.0 Multi-Port Switch Works The PCIe 5.0 Switch IP transparently […]
PCIe Switch for USB4
https://www.rambus.com/interface-ip/pci-express/pcie-switch-for-usb4/PCIe Switch for USB4 Contact Us The PCIe Switch for USB4 (formerly XpressSWITCH) is a customizable, embedded switch for PCI Express (PCIe) designed for implementations in USB4 devices. ContactProduct Brief How the PCIe Switch for USB4 Works A fully configurable fanout switch, the PCIe Switch for USB4 provides one upstream port and up to 31 […]
PCIe 3.1 Controller
https://www.rambus.com/interface-ip/pci-express/pcie3-controller/PCIe 3.1 Controller Contact Us The PCIe 3.1 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express (PCIe) 3.1 performance with great design flexibility and ease of integration. It is fully compatible with the PCIe 3.1/3.0 specification. A PCIe 3.1 Controller with AXI (formerly XpressRICH-AXI) is also available. The controller delivers high-bandwidth and low-latency connectivity […]
Debug and Test Solutions
https://www.rambus.com/interface-ip/pci-express/debug-and-test-solutions/Debug and Test Solutions Contact Us INSPECTOR for PCIe 5.0 Interposer Card for Diagnostic Testing, Exercising and Debug of PCIe Devices at up to Gen5 32 GT/s speed. ContactProduct Brief Inspector for PCIe 5.0 INSPECTOR is a PCIe 5.0-compliant interposer module designed for non-intrusive monitoring, diagnostic, exercising and debug of PCIe devices. INSPECTOR uses transparent switching […]
Delivering Terabyte-Scale Bandwidth with HBM3-Ready Memory Subsystem
https://www.rambus.com/blogs/hbm3-memory-subsystem/An exponential rise in data volume, and the meteoric rise of advanced workloads like AI/ML training, requires constant innovation in all aspects of computing. Memory bandwidth is a critical enabler of unleashing the power of processors and accelerators, and the High Bandwidth Memory (HBM) standard has evolved rapidly to deliver the performance required by the most demanding applications. For current generation HBM2E, Rambus […]
Rambus Advances AI/ML Performance with 8.4 Gbps HBM3-Ready Memory Subsystem
https://www.rambus.com/rambus-advances-ai-ml-performance-with-hbm3-ready-memory-subsystem/Highlights: Provides HBM3-ready memory subsystem solution consisting of fully-integrated PHY and digital controller Supports data rates up to 8.4 Gigabits per second (Gbps), enabling terabyte-scale bandwidth accelerators for artificial intelligence/machine learning (AI/ML) and high-performance computing (HPC) applications Leverages market-leading HBM2/2E experience and installed-base to speed implementation of customer designs using next-generation HBM3 memory SAN JOSE, […]
Rambus Design Summit Featured Speaker: Frank Ferro
https://www.rambus.com/blogs/rambus-design-summit-featured-speaker-frank-ferro/Thanks to everyone who joined us for Rambus Design Summit 2021. Over the coming weeks we’ll highlight the webinars and panels from the event all available now on-demand. About Frank Ferro Frank Ferro is the senior director of product management at Rambus Inc. responsible for memory interface IP products. Having spent more than 20 years […]
451 Research Report: Interconnecting AnalogX and PLDA with Rambus
https://www.rambus.com/blogs/451-research-report-interconnecting-analogx-and-plda-with-rambus/Compute Express Link (CXL) will enable memory expansion and pooling. Memory pooling with CXL 2.0 allows for the tailored matching of workloads to the available memory in the pool leading to improved performance, higher memory use efficiency, and improved utilization and TCO. This future technology will help revolutionize the future of data center architectures. In […]
