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SiFive’s Chief Executive on Opening a Chip Design Factory
http://www.electronicdesign.com/embedded-revolution/sifive-s-chief-executive-opening-chip-design-factory#new_tabBefore he agreed to anything, Naveed Sherwani needed to make 40 phone calls. He had questions about the new RISC-V computer architecture and the company founded by its inventors, SiFive. He had been asked to run it.
SiFive and Rambus to provide IP for the ‘DesignShare’ economy
https://www.rambus.com/blogs/sifive-and-rambus-to-provide-ip-for-the-designshare-economy/SiFive has announced a collaborative partnership with Rambus. More specifically, the latter company’s security technology will be made available for use with SiFive’s Freedom platforms. This includes a hardware root-of-trust, cryptographic cores, key provisioning capabilities and high-value services that are enabled by design. As SiFive CEO Naveed Sherwani points out, leading companies in the semiconductor […]
SiFive eyes silicon reset with RISC-V
http://www.rambusblog.com/2016/07/12/sifive-eyes-silicon-reset-with-risc-v/#new_tabA San Francisco-based startup known as SiFive has announced plans to develop and sell chips based on open-source RISC-V architecture. According to Don Clark of the Wall Street Journal, the tech includes a set of instructions that define the functions of a microprocessor, which can serve as a starting point for designing a chip.
SiFive eyes silicon reset with RISC-V
https://www.rambus.com/blogs/sifive-eyes-silicon-reset-with-risc-v-2/A San Francisco-based startup known as SiFive has announced plans to develop and sell chips based on open-source RISC-V architecture. According to Don Clark of the Wall Street Journal, the tech includes a set of instructions that define the functions of a microprocessor, which can serve as a starting point for designing a chip. “RISC-V […]
Open sourcing Moore’s Law
https://www.rambus.com/blogs/open-sourcing-moores-law-2/Nicole Hemsoth of The Next Platform recently observed that while Moore’s Law has yet to fully run its course, organizations such as the IEEE, along with individual device makers, are already thinking their way “out of a box” which has influenced the semiconductor industry for decades. “The semiconductor industry is not growing; there has been […]
Rambus joins the RISC-V Foundation
http://www.rambusblog.com/2016/04/21/rambus-joins-risc-v-foundation/#new_tabRambus has joined the RISC-V Foundation as a founding member. The organization is dedicated to managing and promoting the adoption of the RISC-V hardware architecture standard throughout the semiconductor market. With this announcement, Rambus joins a coalition comprising dozens of major industry players, including Google, Oracle, Western Digital and BAE Systems.
Rambus joins the RISC-V Foundation
https://www.rambus.com/blogs/rambus-joins-risc-v-foundation/Rambus has joined the RISC-V Foundation as a founding member. The organization is dedicated to managing and promoting the adoption of the RISC-V hardware architecture standard throughout the semiconductor market. With this announcement, Rambus joins a coalition comprising dozens of major industry players, including Google, Oracle, Western Digital and BAE Systems. “RISC-V is a perfect […]
PULPino is a 32-bit RISC-V processor
http://www.rambusblog.com/2016/04/05/pulpino-32-bit-risc-v-processor/#new_tabEngineers at ETH Zurich and the University of Bologna recently debuted the 32-bit PULPino, an open-source microprocessor based on RISC-V architecture. The PULPino – taped out as a 65nm ASIC – is now available for RTL simulation and FPGA mapping.
PULPino is a 32-bit RISC-V processor
https://www.rambus.com/blogs/pulpino-32-bit-risc-v-processor/Engineers at ETH Zurich and the University of Bologna recently debuted the 32-bit PULPino, an open-source microprocessor based on RISC-V architecture. The PULPino – taped out as a 65nm ASIC – is now available for RTL simulation and FPGA mapping. “The core has an IPC close to 1, full support for the base integer instruction […]
Genode OS adds RISC-V support
http://www.rambusblog.com/2016/03/24/genode-os-adds-risc-v-support/#new_tabThe open source instruction set architecture known as RISC-V has gained significant momentum over the past year. To be sure, the ISA is now backed by a number of industry heavyweights, including Google, LG and BAE Systems.
