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Rambus announces industry’s first fully functional DDR5 DIMM

https://hexus.net/tech/news/ram/110387-rambus-announces-industrys-first-fully-functional-ddr5-dimm/#new_tab

Specialist memory company Rambus has announced a fully functional DDR5 DIMM (dual in-line memory module) prototype. It claims to have achieved an industry first with its DIMM “capable of achieving the speeds required for the upcoming DDR5 standard”.

Rambus announces industry’s first functional silicon of server DIMM buffer chipset targeted for next-generation DDR5

http://www.cieonline.co.uk/rambus-announces-industrys-first-functional-silicon-of-server-dimm-buffer-chipset-targeted-for-next-generation-ddr5/#new_tab

Rambus Inc. has announced functional silicon of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype for the next-generation DDR5 memory technology. This represents a key milestone for Rambus as the industry’s first silicon-proven memory buffer chip prototype capable of achieving the speeds required for the upcoming DDR5 standard.

Rambus cracks post-quantum ‘QcBits’ cipher with side-channel power analysis

https://www.rambus.com/blogs/rambus-cracks-post-quantum-qcbits-cipher-with-side-channel-power-analysis/

Rambus security researchers have successfully conducted a side-channel assisted cryptanalysis attack against QcBits, a code-based public key algorithm based on a problem thought to be resistant to quantum computer attacks. QcBits – pronounced “quick-bits” – is a variant of the McEliece public-key cryptosystem based on quasi-cyclic (QC) moderate density parity check (MDPC) codes. According to […]

EE Times says DDR5 is running in Rambus’ labs

https://www.rambus.com/blogs/ee-times-says-ddr5-is-running-in-rambus-labs/

Rick Merritt of the EE Times reports that Rambus has working silicon in its labs for DDR5, which the journalist describes as the next major interface for DRAM dual in-line memory modules (DIMMs). The register clock drivers and data buffers, says Merritt, could help double the throughput of main memory in servers, probably starting in […]

DDR5 Runs in Rambus’ Labs

https://www.eetimes.com/document.asp?doc_id=1332322#new_tab

Rambus has working silicon in its labs for DDR5, the next major interface for DRAM dual in-line memory modules (DIMMs). The register clock drivers and data buffers could help double the throughput of main memory in servers, probably starting in 2019 — and they are already sparking a debate about the future of computing.

Rambus highlights HBM2 PHY collaboration at GLOBALFOUNDRIES Technology Conference

https://www.rambus.com/blogs/rambus-highlights-hbm2-phy-collaboration-at-globalfoundries-technology-conference/

HBM2 PHY We are showcasing our HBM2 PHY at the GLOBALFOUNDRIES Technology Conference at the Hyatt Regency Santa Clara (table #6). Designed for systems that require low latency and high bandwidth memory, our HBM2 PHY is built on GLOBALFOUNDRIES advanced 14nm Power Plus (LPP) process technology. The PHY is fully compliant with the JEDEC HBM2 […]

Next-gen server DIMM buffer chipset targets DDR5 memory

https://www.rambus.com/blogs/next-gen-server-dimm-buffer-chipset-targets-ddr5-memory/

Rambus has announced functional silicon of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype targeted for next-gen DDR5 memory technology. According to Luc Seraphin, senior vice president and general manager of the Rambus Memory and Interfaces Division, the announcement marks a key milestone for both Rambus and the semiconductor […]

DDR5 DIMM Chipset

https://www.rambus.com/memory-interface-chips/ddr5-dimm-chipset/

The Rambus DDR5 Server DIMM buffer chipset is the industry’s first functional silicon targeted for next-generation DDR5. Our chips are designed to enable high-capacity, high-speed and robust memory solutions for tomorrow’s most demanding enterprise and data center applications.

Rambus Announces Industry’s First Functional Silicon of Server DIMM Buffer Chipset Targeted for Next-generation DDR5

https://www.rambus.com/rambus-announces-next-gen-ddr5/

Provides data center architects early path to next-generation memory speeds SUNNYVALE, Calif. – Sept. 20, 2017 – Rambus Inc. (NASDAQ: RMBS) today announced functional silicon  of a double data rate (DDR) server DIMM (dual inline memory module) buffer chipset prototype for the next generation DDR5 memory technology. This represents a key milestone for Rambus and the industry’s […]

Key ingredients for a successful mobile wallet

https://www.rambus.com/blogs/key-ingredients-for-a-successful-mobile-wallet/

Rambus recently interviewed a number of prominent industry experts at the Mobey Forum about the key ingredients for a successful mobile wallet. According to Kristian Luoma of the OP Financial Group, a mobile wallet should be more than simply trustworthy and secure. “[A mobile wallet] needs to be trustworthy and secure for sure, but those are […]

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