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Board of directors authorizes repurchase of up to 20 million shares SAN JOSE, Calif. – November 2, 2020 – Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced that its board of directors has approved a new stock repurchase program authorizing the repurchase of up to 20 million […]
ICE-IP-63 High-Speed Inline Cipher Engine Contact Us The ICE-IP-63 (EIP-63) is a scalable high-performance, multi-channel cryptographic engine that offers AES-GCM operations as well as AES-CTR and GMAC on bulk data. Its flexible data path is suitable to scale from 100 Gbps to 2.4 Tbps to provide a tailored engine with minimal area for your application. […]
Highlights: Internet Protocol Security (IPsec) Packet Engine with integrated Data Plane Development Kit (DPDK) and companion key negotiation toolkit provides complete solution for securing 5G networking from 1 to 10 Gbps data rates Easily integrates into SoCs for 5G base stations, core network, gateways and end points Supports 3GPP, TLS, DTLS protocols, all relevant IPsec […]
人工智能/机器学习(AI/ML)在全球范围内的迅速兴起,正推动着制造业、交通、医疗、教育和金融等各个领域的惊人发展。从2012年到2019年,人工智能训练能力增长了30万倍,平均每3.43个月翻一番,就是最有力的证明。支持这一发展速度需要的远不止摩尔定律,人工智能计算机硬件和软件的各个方面都需要不断的快速改进。
The 3rd AI Hardware Summit took place virtually earlier this month and it was exciting to see how quickly the ecosystem has evolved and to learn of the challenges the industry has to solve in scaling artificial intelligence (AI) infrastructure. I would like to share highlights of the Summit, along with other notable observations from the industry […]
On October 8th, technology experts from across Rambus came together for a virtual summit to present on the selection and implementation of IP solutions for the data center, 5G/edge and IoT devices. In addition, Ed Sperling of Semiconductor Engineering and Shane Rau of IDC joined Rambus executives Neeraj Paliwal, Matt Jones and John Eble for […]
Rambus fellow and distinguished inventor, Dr. Steven Woo, explores the latest developments in AI/ML training and inference. AI/ML performance is advancing at an astonishing rate thanks to purpose-built AI accelerators. Dr. Woo discusses how emerging memory and system interfaces are key to providing the bandwidth needed for the next generation of AI/ML hardware.
Facing a growing matrix of threats, semiconductors must be designed with security as a fundamental consideration. In this webinar, Rambus VP and General Manager for Rambus Security, Neeraj Paliwal, discusses the principles and methodologies for secure chip design and provisioning.
Ed Sperling, Editor in Chief of Semiconductor Engineering moderates a far-ranging roundtable on the future of data center development. IDC research vice president, Shane Rau, discusses the macro trends and their impact on compute and network device architectures. Technology leaders from across Rambus will share the chip and IP solutions that can take data center […]
A hardware root of trust (RoT) provides the secure foundation for a chip or electronic system. A broad range of RoT solutions are available for implementation. In this webinar, Rambus security expert, Bart Stevens, will discuss the considerations for selecting the right root of trust for a target application.