At Rambus, we create cutting-edge semiconductor and IP products, providing industry-leading chips and silicon IP to make data faster and safer.
Found 3588 Results
ECC Core Product Brief
https://go.rambus.com/ecc-core-product-brief#new_tabPart of a full suite of memory controller add-on cores, the Error Correction Coding (ECC) core implements the standard Hamming Code-based DRAM Single Error Correction (SEC) and Double Error Detection (DED) algorithms. The Read-Modify-Write core, offered separately, can be used in conjunction with the ECC Core when dealing with misaligned bursts.
PCIe 4.0 Controller Product Brief
https://go.rambus.com/pcie4-controller-product-brief#new_tabThe PLDA PCIe 4.0 Controller is designed to achieve maximum PCI Express (PCIe) 4.0 performance with great design flexibility and ease of integration. It comprises a complete SerDes subsystems with the Rambus PCIe 4.0 PHY or can integrate with PIPE 4.2-compliant 3rd-party PHYs. The controller is backwards compatible with PCIe 3.1/3.0.
MIPI Testbench Product Brief
https://go.rambus.com/mipi-testbench-product-brief#new_tabThe Northwest Logic MIPI Testbench emulates a MIPI device enabling end-to-end simulation of a MIPI design. It includes separate versions for CSI-2 Transmit, CSI-2 Receive, DSI-2 Host (Transmit), DSI-2 Peripheral (Receive), DSI Host, and DSI Peripheral.
CSI-2 Controller Product Brief
https://go.rambus.com/csi-2-controller-product-brief#new_tabThe Northwest Logic CSI-2 controller core is a second-generation MIPI CSI-2 core optimized for high performance, low power and small size. The core is fully compliant with the CSI-2 standard and implements all three layers defined therein: Pixel to Byte Packing, Low Level Protocol, and Lane Management.
DSI-2 Controller Product Brief
https://go.rambus.com/dsi-2-controller-product-briefThe Northwest Logic DSI-2 controller core is a second-generation MIPI DSI core optimized for high performance, low power and small size. The core is fully compliant with the DSI-2 standard and implements all three layers defined therein: Pixel to Byte Packing, Low Level Protocol, and Lane Management.
MIPI DSI-2 Controller Core
https://www.rambus.com/interface-ip/mipi/dsi2-controller/MIPI DSI-2 Controller Core Contact Us The Rambus MIPI DSI-2 controller core is optimized for high performance, low power and small size. The core is fully compliant with the DSI-2 standard and implements all three layers defined therein: Pixel to Byte Packing, Low Level Protocol, and Lane Management. An ASIL-B version of the core is […]
MIPI CSI-2 Controller Core
https://www.rambus.com/interface-ip/mipi/csi2-controller/MIPI CSI-2 Controller Core Contact Us The Rambus MIPI CSI-2 controller core is optimized for high performance, low power and small size. The core is fully compliant with the CSI-2 standard and implements all three layers defined therein: Pixel to Byte Packing, Low Level Protocol, and Lane Management. For automotive safety-critical applications, an ASIL-B version […]
PCIe 4.0 Controller
https://www.rambus.com/interface-ip/pci-express/pcie4-controller/PCIe 4.0 Controller Contact Us The PCIe 4.0 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express® (PCIe®) 4.0 performance with great design flexibility and ease of integration. It is fully backward compatible with PCIe 3.1/3.0. A PCIe 4.0 Controller with AXI (formerly XpressRICH-AXI) is also available. The controller delivers high-bandwidth and low-latency connectivity for […]
Multi-Protocol Engines Brochure
https://go.rambus.com/multi-protocol-engines-brochure#new_tabMulti-Protocol Engine IPs offer acceleration of IPsec, MACsec, SSL/TLS/DTLS, sRTP and basic hash-crypto in architectures ranging from the look-aside engines to the more sophisticated, powerful inline packet engines.
FIPS Security Toolkit Brochure
https://go.rambus.com/fips-security-toolkit-brochureInside Secure FIPS Security Toolkit provides the professional tools you need to secure your devices and applications. It allows you to deploy high security consistently across platforms without re-designing the security architecture or modifying every application.
