With the ‘Internet of Things’ (IoT) getting more and more pervasive, an increasing number of connected things around us collect, handle and control sensitive data. The hacking of IoT devices can affect privacy, cause a loss of physical and information security, and impact availability of services. Connected devices significantly increase the attack surface of systems and networks as they potentially provide hackers a local springboard into those systems. Mass-deployed connected devices have been used to mount distributed Denial of Service attacks. IoT devices face a hard security challenge as they face high attack exposure while having limited resources to protect themselves. This session will cover the tools and solutions provided by Rambus to help protect and harden resource constrained devices from network-based attacks.
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Kyocera Selects Rambus for IoT Security
Cyberhackers want to maximize their probability of success by attacking the weakest point of defense. With data centers being virtual fortresses both in the physical and digital domains, adversaries have turned their focus to the edge and end points for exploitation. Imagine the data trove that can be mined from a networked office printer: financials, competitive data, business operations, personnel files…it’s all there for the taking if left unsecured.
That’s why Kyocera selected the FIPS 140-2 CMVP-certified Rambus RT-130 Root of Trust, and AES-IP-38 AES Accelerator to secure their multi-function products. Kyocera is passionate about protecting their customers’ business data. They even published an ebook to explain how companies can secure these vital digital assets. FIPS certification is the gold standard for security solutions signaling that Kyocera solutions provide customers with the highest level of data protection.
What about for other kinds of IoT devices? Well, there’s good news. Rambus has a full family of FIPS-certified, powerful but lightweight, Root of Trust solutions. These support secure boot, manage secure firmware upgrades, administer keys and provide cryptographic services with models appropriate for nearly every kind of IoT device. Our broad line of crypto accelerators and protocol engines encrypt and protect data moving over the network. So whatever IoT devices your chip design addresses, Rambus can help provide the highest level of security for your product.
AIと5Gにより高まるIoT機器の脅威 (5G and AI Raise Security Risks for IoT Devices)
5G represents a revolution in mobile technology with performance that will rival that of wireline networks. 5G’s Ultra-reliable Low Latency Communication (uRLLC) links will enable a profusion of artificial intelligence (AI)-powered IoT devices from delivery drones to smart cities. The rapid rise in the number of smart IoT devices, coupled with expanded connectivity, will greatly escalate the growth of data and network traffic.
5G and AI Raise Security Risks for IoT Devices
5G represents a revolution in mobile technology with performance that will rival that of wireline networks. 5G’s Ultra-reliable Low Latency Communication (uRLLC) links will enable a profusion of artificial intelligence (AI)-powered IoT devices from delivery drones to smart cities. The rapid rise in the number of smart IoT devices, coupled with expanded connectivity, will greatly escalate the growth of data and network traffic.
Rambus’ Ben Levine talks IoT security and cryptography with EDA Café
Ben Levine, Senior Director of Product Marketing at Rambus, recently sat down with Sanjay Gangal of EDA Café to discuss IoT security and cryptography. According to Levine, security should be embedded in every chip. More specifically, says Levine, a separate hardware-based security core can help protect both the SoC itself and the system it powers.
“This is particularly important for connected devices,” Levine explains. “Everything is connected to the internet these days – and every device is now exposed to wide range of threats and attackers. So you need really strong security. Devices have also become more complex and challenging to secure.”
Silicon Complexity and Security
The relationship between silicon complexity and security, says Levine, came to the fore with the advent of Meltdown and Spectre in 2018. As we’ve previously discussed on Rambus Press, Meltdown and Spectre were independently disclosed by a number of security experts, including senior Rambus technology advisor Paul Kocher and senior Rambus security engineer Mike Hamburg.
“Modern CPUs are incredibly complex. They are designed to be power efficient and high performance, but not necessarily secure,” Levine elaborates. “Security vulnerabilities happen when components interact in ways designers never thought about. As the number of components and complexity increases, so do interactions and potential security vulnerabilities.”
System designers, says Levine, have to get everything right, although an attacker only needs a single vulnerability to succeed.
“The solution we think makes the most sense is partitioning or siloing security away from other parts of an application that don’t necessarily need to be secure,” he states. “Keys, passwords, identifiers, security, and communications protocols; all of these need to be in a secure domain [secure core]. This domain can be optimized for security and kept relatively simple and straightforward.”
Rambus CryptoManager Root of Trust (CMRT) RT630
The advantage of secure cores, says Levine, is that they can be specifically designed from the ground up to provide robust security. To illustrate an example of a secure core, Levine highlights the Rambus CryptoManager Root of Trust (CMRT) RT630. Built around a custom RISC-V CPU, the CMRT RT630 is at the forefront of a new category of programmable hardware-based security cores.
As Levine explains, the CMRT RT630 is siloed from the primary processor so it can securely run sensitive codes, processes, and algorithms. Moreover, the CMRT provides the primary processor with a full suite of security services, such as secure boot and runtime integrity, remote attestation, and broad crypto acceleration for symmetric and asymmetric algorithms.
The CMRT also helps protect systems against test and debug interface attacks, Power/EM analysis (SPA/DPA), and other side-channel attacks, including timing attacks. Last, but certainly not least, the CMRT supports multiple roots of trust, with hardware ensuring isolation of resources, keys, and security assets. Each entity – such as a chip vendor, OEM or service provider – has access to its own virtual security core and performs secure functions without having to trust other entities.
AI & Quantum Computing
Levine also touches on security threats targeting artificial intelligence (AI) silicon, noting that there were quite a number of AI accelerators in the data center and at the edge. In addition, Levine discusses some of the real-world security risks associated with quantum computing.
“Quantum computing offers a lot of promise. However, asymmetric and symmetric cryptographic algorithms are designed to be secure. Guessing a random key for an AES encryption algorithm [using a conventional computer] would take you [forever],” he elaborates. “However, a quantum computer doesn’t work the same way as [today’s] computers. Asymmetric and symmetric encryption is vulnerable to quantum computing. IBM has said [current] algorithms won’t be secure against quantum computing.”
Rambus, says Levine, has been active in creating a new generation of algorithms that won’t be vulnerable to quantum computing and has submitted its work to the National Institute of Standards and Technology (NIST).
View Ben Levine’s full video interview with Sanjay Gangal of EDA Café
Go here for our primer on hardware roots of trust
Rambus’ Ben Levine talks IoT security and cryptography with EDA Café
Ben Levine, Senior Director of Product Marketing at Rambus, recently sat down with Sanjay Gangal of EDA Café to discuss IoT security and cryptography. According to Levine, security should be embedded in every chip. More specifically, says Levine, a separate hardware-based security core can help protect both the SoC itself and the system it powers.
“This is particularly important for connected devices,” Levine explains. “Everything is connected to the internet these days – and every device is now exposed to wide range of threats and attackers. So you need really strong security. Devices have also become more complex and challenging to secure.”
Silicon Complexity and Security
The relationship between silicon complexity and security, says Levine, came to the fore with the advent of Meltdown and Spectre in 2018. As we’ve previously discussed on Rambus Press, Meltdown and Spectre were independently disclosed by a number of security experts, including senior Rambus technology advisor Paul Kocher and senior Rambus security engineer Mike Hamburg.
“Modern CPUs are incredibly complex. They are designed to be power efficient and high performance, but not necessarily secure,” Levine elaborates. “Security vulnerabilities happen when components interact in ways designers never thought about. As the number of components and complexity increases, so do interactions and potential security vulnerabilities.”
System designers, says Levine, have to get everything right, although an attacker only needs a single vulnerability to succeed.
“The solution we think makes the most sense is partitioning or siloing security away from other parts of an application that don’t necessarily need to be secure,” he states. “Keys, passwords, identifiers, security, and communications protocols; all of these need to be in a secure domain [secure core]. This domain can be optimized for security and kept relatively simple and straightforward.”
Rambus CryptoManager Root of Trust (CMRT) RT630
The advantage of secure cores, says Levine, is that they can be specifically designed from the ground up to provide robust security. To illustrate an example of a secure core, Levine highlights the Rambus CryptoManager Root of Trust (CMRT) RT630. Built around a custom RISC-V CPU, the CMRT RT630 is at the forefront of a new category of programmable hardware-based security cores.
As Levine explains, the CMRT RT630 is siloed from the primary processor so it can securely run sensitive codes, processes, and algorithms. Moreover, the CMRT provides the primary processor with a full suite of security services, such as secure boot and runtime integrity, remote attestation, and broad crypto acceleration for symmetric and asymmetric algorithms.
The CMRT also helps protect systems against test and debug interface attacks, Power/EM analysis (SPA/DPA), and other side-channel attacks, including timing attacks. Last, but certainly not least, the CMRT supports multiple roots of trust, with hardware ensuring isolation of resources, keys, and security assets. Each entity – such as a chip vendor, OEM or service provider – has access to its own virtual security core and performs secure functions without having to trust other entities.
AI & Quantum Computing
Levine also touches on security threats targeting artificial intelligence (AI) silicon, noting that there were quite a number of AI accelerators in the data center and at the edge. In addition, Levine discusses some of the real-world security risks associated with quantum computing.
“Quantum computing offers a lot of promise. However, asymmetric and symmetric cryptographic algorithms are designed to be secure. Guessing a random key for an AES encryption algorithm [using a conventional computer] would take you [forever],” he elaborates. “However, a quantum computer doesn’t work the same way as [today’s] computers. Asymmetric and symmetric encryption is vulnerable to quantum computing. IBM has said [current] algorithms won’t be secure against quantum computing.”
Rambus, says Levine, has been active in creating a new generation of algorithms that won’t be vulnerable to quantum computing and has submitted its work to the National Institute of Standards and Technology (NIST).
Ben Levine’s full video interview with Sanjay Gangal of EDA Café can be viewed here.
