TRNG-IP-77 FIPS-Certified True Random Number Generators

The TRNG-IP-77 is a FIPS-compliant and certified IP core for True Random Number Generation (TRNG) with an optional post-processor and several internal self-tests. Designed for easy integration into ASICs and SOCs, the 100% digital standard cell based TRNG-IP-77 provides a reliable and cost-effective embedded IP solution for our customer’s SoCs.

Non-deterministic Random Number Generator, FIPS-140 SP800-90A/B compliant, ESV certified for NRBGs and DRBGs (#E225).

High performance, low power, fully digital, standard cell only, supports all CMOS nodes.

Available as standalone RBG or embedded in the Rambus RT-130, RT-630, RT-660 Root of Trusts

How the TRNG-IP-77 works

TRNGs are typically deployed in semiconductors for securing data communications, electronic transactions, and data storage. They are used for generation of keys, initialization vectors, cookies, and nonces.

Additionally, TRNGs can also be used for statistical sampling, communications protocol timers, as well as noise generation. The TRNG-IP-77 implements a self-timed digital oscillator circuit using rule-30 elements that causes voltage transitions to proceed bi-directionally around a ring.

This patent-protected TRNG implementation has all the noise-accumulation benefits of traditional free-running oscillators, but also adds non-traditional source of entropy: a bi-directional ring of chaotic pattern generators. This novel ring topology creates bi-directional constructive/destructive interference of the waveform, resulting in very fast time-to-max-entropy, and very high entropy generation rates. Compared to free running oscillator-based entropy sources, this RBG core has other advantages such as inherent resistance to simple noise injection locking, and minimized need for oscillator calibration and/or noise isolation during implementation.

The TRNG-IP-77 is a security aware design:

  • SP 800-90B entropy source, digital 2-ring Chaotic Random Number Generator.
  • SP 800-90A AES CTR mode based post processing
  • Selectable reseed interval
  • Built-in health tests
 

The TRNG-IP-77 is compliant with Federal Information Processing Standards (FIPS) Publication 140-3, facilitating system certification. The design is compliant with the latest versions for NIST SP800-90A/B/C. A NIST SP800-90A Deterministic Random Bit Generator (DRBG) is available for the required post processing. The TRNG-IP-77 is ESV certified and is FIPS-approved when integrated into Rambus Root of Trust solutions.

The TRNG-IP-77 is silicon proven, and its flexible, layered design makes it easy to integrate into SoCs.

Introduction to Side-Channel Attacks eBook

Introduction to Side-Channel Attacks

Side-channel attacks conducted against electronic gear are relatively simple and inexpensive to execute. Such attacks include simple power analysis (SPA) and Differential Power Analysis (DPA). As all physical electronic systems routinely leak information, effective side-channel countermeasures should be implemented at the design stage to ensure protection of sensitive keys and data.

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