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POLY-IP-53 Poly1305-based MAC Accelerators

Poly-IP-53 (EIP-53) is IP for accelerating the Poly1305 hash-based message authentication algorithm (RFC7539), supporting the NIST MAC mode up to 6.4 Gbps @ 450MHz. Designed for fast integration, low gate count and full transforms, the Poly-IP-53 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.

Poly1305 family of accelerators

Available in several configurations / performance grades

Supporting TLS1.3 IoT HomeKit

How the POLY-IP-53 works

The Poly-IP-53 is a family of the cryptographic library elements in the Rambus hardware IP library (formerly of Inside Secure). For example, the Poly-IP-53 is the cipher core embedded in the Vault-IP-140 platform security engines providing support for TLS1.3 and HomeKit IoT applications (Poly1305 is also available as software implementation in the VaultIP core). The accelerators include I/O registers, encryption and decryption cores, and the logic for feedback modes and key scheduling.

Sustained performance for any object sizes ranges from 1 to 6.4 Gbps depending on the configuration and area. Gate count is around 50K gates depending on the configuration.

Rambus also offers the required ChaCha20 cipher to match the Poly1305 algorithm to match the HomeKit.

POLY-IP-53 Poly1305 based MAC Accelerators
POLY-IP-53 Poly1305 based MAC Accelerators
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POLY-IP-53 Information

Key benefits:

  • Silicon-proven implementation
  • Fast and easy to integrate into SoCs
  • Flexible layered design
  • Complete range of configurations
  • World-class technical support
 

Features:

  • Wide bus interface (128-bit data, 128-bit keys, 135-bit digest) or 32-bit register interface
  • Key size: 128 bits
  • Includes initialization stage
  • Supports continuation mode
  • Fully synchronous design
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