Security
Multi-Protocol Engines for IPsec, TLS and SSL
Intelligent packet engines contain complete protocol knowledge, delivering the benefits of throughput acceleration and CPU offload. Multi-Protocol Engines offer acceleration of IPsec, MACsec, SSL/TLS/DTLS, sRTP and basic hash and crypto operations at speeds from 100 Mbps to 100 Gbps in architectures ranging from the traditional look-aside engines to the more sophisticated, powerful inline packet engines.
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Product Brochure| Solution | Product Brochure | Description |
|---|---|---|
| Protocol-IP-93 |  | Accelerate IPsec, SSL/TLS and SRTP up to 300 Mbps with this protocol-aware packet engine with look-aside interface. Designed for fast integration, low-gate count, full transforms and easy integration into SoC designs. |
| Protocol-IP-97 | | Accelerate IPsec, SSL/TLS and SRTP up to 2000 Mbps with this protocol-aware packet engine with look-aside interface. Designed for fast integration, low-gate count, full transforms and easy integration into SoC designs. |
| Protocol-IP-98 | | Accelerate IPsec, SSL/TLS, DTLS, SRTP and MACsec up to 2000 Mbps with this protocol-aware packet engine with classifier and look-aside interface. Designed for fast integration, maximum CPU offload, full transforms and easy integration into SoC designs. |
| Protocol-IP-197 | | Accelerate IPsec, SSL/TLS, DTLS (CAPWAP), SRTP and MACsec up to 50 Gbps with protocol-aware packet engine with classifier and in-line interface. Designed for fast integration, maximum CPU offload, full transforms and easy integration into SoC designs. Supports new and legacy crypto algorithms, streaming and AMBA interface. |
| Packet Engine IP-96 | Accelerate IPsec, SSL/TLS, SRTP and MACsec up to 5 Gbps with this programmable packet transform pipeline. Designed for fast integration, full transforms and easy integration into SoC designs. |
The CryptoManager Root of Trust
Built around a custom RISC-V CPU, the Rambus CryptoManager Root of Trust (CMRT) is at the forefront of a new category of programmable hardware-based security cores. Siloed from the primary processor, it is designed to securely run sensitive code, processes and algorithms. More specifically, the CMRT provides the primary processor with a full suite of security services, such as secure boot and runtime integrity, remote attestation and broad crypto acceleration for symmetric and asymmetric algorithms.
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