[Feb 22 @ 11am PT] In this webinar, Adelaide O’Brien, Research Director, Government Digital Transformation Strategies of IDC and Neeraj Paliwal, general manager of Security IP and Rambus, will discuss the need and solutions for protecting systems at the foundational hardware level.
Security IP
Stopping Stealthy Counterfeit Chips with PUF Helper-Data Images
PUFs, physically unclonable functions, are mixed-signal circuits which rely on variations unique to a specific chip in order to self-generate a digital “fingerprint.” These fingerprints can be used as the basis of cryptographic keys. While that’s useful, the real power of PUFs is leveraging their unclonable transformation function to enable a challenge-response mechanism that can distinguish an authentic chip from a perfect adversarial clone at any time after the original chip is fielded. In this webinar, Scott Best, Technical Director of Rambus Security IP, will describe the methods that PUF helper-data images generated during the chip manufacturing process can be employed to end the risk of undetectable counterfeit chips.
Emerging Compute Architectures for the Evolving Data Center
As the world has become increasingly connected, processing continues to evolve from the familiar cloud computing paradigm. The vast profusion of IoT devices has contributed to the exponential rise in data volume. Greater intelligence is moving to the edge of the network and to the end points themselves to provide greater, real-time functionality. The implications for global network infrastructure are profound and there are significant developments in computing architectures which will shape the future data center.
Watch this webinar and learn:
- About the latest developments in computing architectures shaping the data center of the future
- How increasing connectivity is driving change in data processing
- How technologies like CXL can improve memory bandwidth and capacity
Data Center Dynamics
Ed Sperling, Editor in Chief of Semiconductor Engineering moderates a far-ranging roundtable on the dynamics shaping the future of the data center. Rambus Fellow and Distinguished Inventor, Steven Woo, discusses the macro trends and their impact on compute and network device architectures. Technology leaders from across Rambus will share the chip and IP solutions that can take data center performance and security to the next level.
In this webinar, you’ll learn:
- Technology trends for next-generation data centers
- Requirements and solutions for memory and system interconnects
- Implications and solutions for data center security
Securing High-Speed Data in Motion Using MACsec and Encryption Cores
Providing Layer 2 security, MACsec is becoming the predominant solution for safeguarding network traffic. While network security is increasingly a de facto requirement, there is a growing trend of protecting the SoC interfaces as well, including short distance ones such as PCI Express (PCIe) and those to off-chip memory. In this webinar, Rambus security expert, Gijs Willemse, will discuss the design and implementation of hardware-based MACsec security and trends for high-performance inline encryption.
In this webinar, you’ll learn:
- Requirements for secure communication
- MACsec positioning vs. other secure protocols
- Use cases and implementation of MACsec
Securing Data Center AI/ML Workloads
With the rising value of AI/ML spanning training and inference models and data, as well as the AI hardware itself, the threats from adversaries are greater than ever. As such, a security strategy for AI/ML workloads and hardware needs to offer far more than secure boot and authentication. Rambus security expert, Bart Stevens will discuss how a hardware root of trust can be the foundation for AI/ML security through defense in depth, partitioning of secure operations, and state-of-the-art protections from side channel attacks.
In this webinar, you’ll learn:
- Security strategy for AI/ML workloads
- Use cases and implementation of hardware root of trust
