Part of a full suite of memory controller add-on cores, the Memory Test Analyzer Core can be used in conjunction with the Memory Test Core to capture actual and expected test data. The core is useful for chip and board validation. It provides low-cost, built-in logic analyzer capability similar in concept to FPGA-based internal logic analyzer tools.
Multi-Port Front-End Core Product Brief
Part of a full suite of memory controller add-on cores, the Multi-Port Front-End Core provides a multi-port interface to Northwest Logic memory controller cores.
AXI Interface Core Product Brief
Part of a full suite of memory controller add-on cores, the AXI Interface Core is designed for use in applications requiring ARM’s Advanced eXtensible Interface (AXI). It requires the Read-Modify-Write core which is available separately.
Memory Test Core Product Brief
Part of a full suite of memory controller add-on cores, the Memory Test Core provides comprehensive memory test support for chip and board verification. It can be used in conjunction with the Mem Test Analyzer Core to capture the actual and expected test data.
Reorder Core Product Brief
Part of a full suite of memory controller add-on cores, the Reorder Core reorders requests based first on priority and second on throughput optimization. Throughput optimization includes moving same bank/same row requests next to each other, same bank/different row requests away from each other, moving reads next to reads and writes next to writes.
ECC Core Product Brief
Part of a full suite of memory controller add-on cores, the Error Correction Coding (ECC) core implements the standard Hamming Code-based DRAM Single Error Correction (SEC) and Double Error Detection (DED) algorithms. The Read-Modify-Write core, offered separately, can be used in conjunction with the ECC Core when dealing with misaligned bursts.
