Lowering Risks with RISC-V

This entry was posted on Friday, August 24th, 2018.

Reduced Instruction Set Computing Five (RISC-V) is an open Instruction Set Architecture (ISA) designed with small, fast, and low-power real-world implementations in mind. It describes the way in which software talks to an underlying processor, in a manner similar to the x86 ISA for Intel/AMD processors and the ARMv8 ISA for the latest ARM processors. However, unlike x86 ISA and ARMv8 ISA, the RISC-V ISA is open source.  Any party can build a processor that using RISC-V. Not only simply processing architecture, but with a substantial body of supporting software, RISC-V can be freely used by anyone, for any purpose, and useful in a wide range of devices.

In the wake of Meltdown, Spectre, and Foreshadow exploits found in modern CPUs, people are beginning to realize that modern CPUs may be designed for performance first, safety second. In Rambus’ CryptoManager Root of Trust, the RISC-V core is located on the same silicon as the general processor, but physically separated by a secure boundary. It can run algorithms and processes within that secure boundary to protect against a wide range of attacks, including side-channel attacks, and protect against software vulnerabilities and exploits. It can also prevent device cloning.


Pennies Saved with RISC-V

Designing chips, while always expensive, has becoming increasingly costly as process nodes have shrunk. New chip architectures can cost tens of millions of dollars, so every investment is a big risk. The challenge of building chips that require years of research development, combined with the constant flow of more demanding software, is making it more difficult for silicon designers to predict the future.

With companies like Apple, Facebook, Google, and Samsung building their own processors instead of relying on Intel, Qualcomm, or others, there is major interest in RISC-V. The open source, free approach could potentially lower risks associated with building custom chips. Because of the low cost and the open source nature of the architecture, manufacturers are free to design a chip without expending the amount of resources usually associated with designing a chip. Companies like Nvidia and Western Digital have signed on to use RISC-V in their own silicon. The former is using RISC-V for a governing microcontroller that manages its graphics cards while the latter plans to unveil a new RISC-V processor for its cores in its hard drives for 2019-2020.

The Bottom Line

The cost for investing in new chip architecture is high. As technology has advanced, with software becoming more dynamic and demanding, making chips has become so costly, couple with more demanding software. With the open-source nature of RISC-V, multiple vendors are supported, and the instruction set is accessible and free. With RISC-V, the possibilities are endless for chip vendors and manufacturers.