Dell Chief Research Officer Jaishankar ‘Jai’ Menon recently told analysts and journalists attending the company’s Solutions Summit in Brussels that next-gen data centers will be characterized by homogenous servers tasked with fulfilling all functions of networking and storage.
In addition, says Menon, the average 2U server will likely feature 80 CPU cores, store the majority of data on flash and include a new class of non-volatile memory that has yet to be produced. Additional key specs could potentially include 12 TB of memory with a total bandwidth of 400 GB/s, 96 TB of disk capacity and total network bandwidth of 600 Gb/s.
“He believes that eventually, data centers will move from being software-defined to what he calls software-based. The difference here is software-defined still requires at least three different components: servers, storage and networking. In a software-based data center, servers rule supreme, and storage and networking functions are all completely virtualized,” writes Max Smolaks of TechWeek Europe.
“Servers of the future will need faster non-volatile memory too, to occupy the position between flash and DRAM. Such memory will have to be 50x-1000x faster than current generation flash, but offer around a hundred times more read-write cycles. According to Menon, the most promising candidates are Phase Change Memory (PRAM) likely to appear around 2016, and Resistive RAM (RRAM) which is expected in 2018.”
Loren Shalinsky, a Strategic Development Director at Rambus, notes that the projected increase of CPU cores actually indicates a slowdown in (CPU core) growth. More specifically, the increase is not as rapid as the 50% jump the
industry saw from 2013 to 2014 – particularly when compared to recently launched E5 2600 devices.
“The total memory bandwidth would also need to increase ~33%/year to achieve Dell’s projections, which is similar to what we’ve seen from v2 to v3 CPUs,” he explained.
“To utilize conventional DDR memory technology, DRAM would have to achieve speeds of over 12Gb/sec, approximately 4x the top-end (spec’d) speed of DDR4. There are ways for a conventional DDR4 memory system to achieve this bandwidth, such as increasing the number of memory channels per CPU from 4 to 12.”
The above-mentioned approach facilitates higher memory bandwidth, thereby reducing the need for an increase in the number of memory channels.
As we’ve previously discussed, Rambus is already looking beyond the conventional DDR4 paradigm with its R+ technology to extend main memory, with techniques such as near ground signaling, module threading and dynamic point-to-point. To be sure, recent R+ ‘Beyond DDR’ test silicon successfully demonstrated 6.4Gbps data rates with single ended signaling, multi-rank/multi-DIMM support. In addition, R+ offers 5% better DRAM power efficiency and zero DRAM idle power dissipation.