LOS ALTOS, CALIFORNIA, UNITED STATES – 02/04/2008
| Who: | Rambus Inc. (Nasdaq: RMBS) | |
| Where: | DesignCon 2008 Booth # 205 Santa Clara Convention Center Santa Clara, CA, USA |
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| When: | February 5-7, 2008 | |
Join Rambus at DesignCon 2008 for demos, displays and presentations on our latest technology developments.
Rambus Presentations
Tuesday, February 5, 2008 – 10:15am-10:55am
10-TA3: Analyzing the Impact of Simultaneous Switching Noise on System Margin in Gigabit Single-Ended Memory Systems
Ralf Schmitt, Senior Engineering Manager
Wednesday, February 6, 2008 – 2:00pm -2:40pm
2-WP1: How to Find if My Checker is Complete and Exhaustive? – A Set of Guidelines Using System Verilog and Memory Controller Example
Dinesh Malviya, Lead Engineer – Digital Design
Wednesday, February 6, 2008 – 2:50pm-3:30pm
2-WP-2: Mixed-Signal Integration: Functional Verification in the Presence of Linear Analog Components
Tom Sheffler, Senior Principal Engineer
Wednesday, February 6, 2008 – 2:50pm-3:30pm
6-WP2: Study of Signal and Power Integrity Challenges in High Speed Memory I/O Designs Using Single Ended Signaling Schemes
Dan Oh, Senior Engineering Manager
Thursday, February 7, 2008 – 9:00am-9:40am
7-TAH1: In-Situ Characterization of High Speed Signaling Systems with On Chip Measurements
Qi Lin, Senior Member of the Technical Staff
Rambus Demos and Displays
- The Terabyte Bandwidth Initiative, featuring new memory signaling innovations that facilitate data rates of 16Gbps, enables a future memory architecture that can deliver an unprecedented terabyte per second (TB/s) of memory bandwidth (1 terabyte = 1,024 gigabytes) to a single System-on-Chip (SoC). Innovations include the industry’s first differential signaling for both data and command/address (C/A); FlexLink™ C/A, the industry’s first full-speed, point-to-point C/A link; and 32X Data Rate (32 data bits per input clock cycle) technology.
- The XDR™ memory architecture, a differential memory system solution, operating at 5.6GHz with FlexPhase™ circuit technology calibration and Octal Data Rate (ODR) read/write operation.
- A low-cost XDR system solution implemented on a 2-layer printed circuit board.
- A DDR3 memory controller interface signaling demonstration at 1066 Mbps.
- A multi-Gbps low-power signaling demonstration with a test transceiver dissipating only 14 mW, resulting in a power-performance metric of 2.2 mW/Gbps.
- A PLAYSTATION®3 (PS3™) open demo board, featuring XDR technology. The Rambus XDR memory interface and FlexIO™ processor bus enable an unprecedented aggregate bandwidth of over 65 gigabytes-per-second for the Cell Broadband Engine™ and supporting chips at the heart of the PS3.
- A Sharp® projector, featuring Texas Instruments® DLP® BrilliantColor™ technology and Rambus XDR technology. The Rambus XDR memory interface operates at 4.0GHz and brings unparalleled memory performance to the TI DLP processor.
For registration and additional information, please visit http://www.designcon.com/2008.
About Rambus Inc.
Rambus is one of the world’s premier technology licensing companies specializing in the invention and design of high-speed memory architectures. Since its founding in 1990, the Company’s patented innovations, breakthrough technologies and renowned integration expertise have helped industry-leading chip and system companies bring superior products to market. Rambus’ technology and products solve customers’ most complex chip and system-level interface challenges enabling unprecedented performance in computing, communications and consumer electronics applications. Rambus licenses both its world-class patent portfolio as well as its family of leadership and industry-standard interface products. Headquartered in Los Altos, California, Rambus has regional offices in North Carolina, India, Germany, Japan, Korea and Taiwan. Additional information is available at www.rambus.com.
Rambus and the Rambus logo are registered trademarks of Rambus Inc. XDR, FlexPhase and FlexLink are trademarks of Rambus Inc. All other trade names are the service marks, trademarks, or registered trademarks of their respective owners.
