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AI applications and emerging computing architectures – Virtual Conversation (part 1 of 2)

https://www.eeworldonline.com/ai-applications-and-emerging-computing-architectures-virtual-conversation-part-1-of-2/#new_tab

Hosted by Jeff Shepard, EE World has organized this “virtual conversation” with Gary Bronner (GB), Senior Vice President with Rambus Labs. Mr. Bronner has generously agreed to share his experience and insights into AI applications and emerging computing architectures.

Protecting Chiplet Architectures With Hardware Security

https://semiengineering.com/protecting-chiplet-architectures-with-hardware-security/#new_tab

Chiplets are gaining significant traction as they provide compelling benefits for advancing semiconductor performance, costs, and time to market. With Moore’s Law slowing, building more powerful chips translates into building bigger chips. But with chip dimensions pushing up against reticle limits, growing the size of chips is increasingly impractical. Chiplets offer a new path forward […]

Feast your eyes on the first DDR5 memory modules

https://www.theverge.com/circuitbreaker/2020/10/7/21506883/ddr5-ram-memory-first-modules-sk-hynix#new_tab

Three years after the computer industry promised to double the speed of the world’s computer memory with the DDR5 spec, it’s finally nearly almost here. SK Hynix has officially announced the world’s first DDR5 memory modules. The company tells The Verge it expected to start selling them in Q3 2021, but they’re ready whenever systems can support them.

SK hynix launches first DDR5 DRAM

https://www.newelectronics.co.uk/electronics-news/sk-hynix-launches-first-ddr5-dram/230998/#new_tab

SK hynix has announced the launch of the world’s first DDR5 DRAM, optimised for Big Data, Artificial Intelligence (AI), and machine learning (ML) as a next generation standard of DRAM.

5G Network Infrastructure to Drive Memory Diversity

https://www.eetasia.com/5g-network-infrastructure-to-drive-memory-diversity/#new_tab

For consumers, 5G brings with it the potential of a better user experience on smartphones, but its influence on memory uptake won’t be at the device level. Handset makers will continue to add more DRAM and flash storage to smartphones regardless of network connections. The memory in 5G network infrastructure will be even more diverse given the […]

World’s first DDR5 DRAM module has focus on power

https://www.eenewspower.com/news/worlds-first-ddr5-dram-module-has-focus-power#new_tab

SK hynix is launching the world’s first DDR5 memory module, aimed at Big Data, Artificial Intelligence (AI), and machine learning (ML) with a key focus on power consumption. The DDR5 memory module is supports transfer rate of 4.8 to 5.6Gbit/s, 1.8 times faster than the previous generation, at 1.1V rather than 1.2V. This reduces the […]

SK Hynix Launches World’s First DDR5 DRAM Modules Rated At 4.8 Gbps And Beyond

https://hothardware.com/news/sk-hynix-launches-worlds-first-ddr5-dram-modules#new_tab

Back in July, JEDEC finalized the specifications for DDR5 memory, and laid out a number of key performance advantages over DDR4 including quadrupling the maximum die density to 64Gb and boosting maximum data rates from 3.2Gbps to 6.4Gbps [official]. Today, SK Hynix has announced that it is launching the world’s very first DDR5 DRAM chips.

5G Mixes, Matches Memories

https://www.eetimes.com/5g-mixes-matches-memories/##new_tab

For consumers, 5G brings with it the potential of a better user experience on smartphones, but its influence on memory uptake won’t be at the device level. Handset makers will continue to add more DRAM and flash storage to smartphones regardless of network connections. The memory in 5G network infrastructure will be even more diverse given the […]

Rambus Demonstrates HBM2E Running at 4 Gbps: 512 GB/s per HBM2E Stack

https://www.tomshardware.com/news/rambus-demonstrates-hbm2e-running-at-4-gbps-512-gbs-per-hbm2e-stack#new_tab

Rambus has demonstrated that its HBM2E solution, which consists of a memory controller and a verified 1024-bit PHY, can operate at a whopping 4.0 Gbps data transfer rate per pin. The demonstration is meant to prove potential clients that the HBM2E solution can scale and offer a 25% higher peak bandwidth than is officially defined by JEDEC’s […]

Rambus Advances HBM2E Performance to 4.0 Gbps for AI/ML Training Applications

https://www.rambus.com/rambus-advances-hbm2e-performance-to-4-0-gbps-for-ai-ml-training-applications/

Highlights:  Fully-integrated HBM2E memory interface solution, consisting of verified PHY and controller, achieves industry’s fastest performance New benchmark in performance supports accelerators requiring terabyte-scale bandwidth for artificial intelligence/machine learning (AI/ML) training applications Partners with SK hynix and Alchip to develop 2.5D HBM2E memory system solution using TSMC N7 process and CoWoS® advanced packaging technologies Offers unrivaled […]

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