Microsemi Corporation recently announced that its SmartFusion®2 system-on-chip (SoC) field programmable gate arrays (FPGAs) and IGLOO®2 FPGAs successfully passed certification for resistance to differential power analysis (DPA) within the context of the DPA Countermeasure Validation Program developed by Rambus’ Cryptography Research Division (CRD). These are the first FPGAs to achieve the prestigious certification.
Microsemi FPGAs awarded Rambus Cryptography Research DPA logo certification
ARM TechCon
As the chasm between hardware engineers and software developers yields to a more integrated and collaborative design environment, these communities now work synergistically to accelerate time to market and optimize their designs utilizing both hardware and software. ARM TechCon 2015 at the Santa Clara Convention Center is designed to facilitate this collaboration by connecting the hardware and software communities in one event.
Understanding the memory-storage pyramid
Loren Shalinsky, a Strategic Development Director at Rambus, recently penned a detailed article for Semiconductor Engineering that explores the memory-storage hierarchy. As he puts it, the hierarchy, or pyramid, is a particularly succinct method of understanding computer systems and the dizzying array of memory options available to the system designer.
Navigating the DDR4 adoption road map
The projected adoption rate of DDR4 as the dominant industry memory standard was a major topic of discussion at Intel’s Developer Forum earlier this month,
Future challenges for DDR4 and beyond
Ely Tsern, VP and chief technologist for the Rambus Memory and Interfaces division, has identified five key trends driving future server memory. These include Big
Use Cases: Personalization
Related to the inherent complexities and costs associated with building a brand new chip, fabless chip manufacturers are under constant pressure to improve operating efficiencies while, at the same time, satisfying OEM customer requirements. As such, large OEM customers requesting personalization, customer specific data preparation and feature customization of standard parts challenge the chipmakers ability to minimize inventory overhead and improve operating efficiencies.
Customer specific personalization services may be accomplished with a high degree of visibility and audit tracking controls that are secured by the CryptoManager solution for each step in the manufacturing supply chain.
For example (see Figure 1), if three OEM customers of a SoC manufacturer each request different feature configurations and/or data preparations for a standard SoC product, the SoC manufacturer needs to figure out how to support three customerspecific part types without creating three different SKUs.
Device personalization creates complexity in manufacturing and in inventory management. With multiple SKUs for standard products, managing inventory for each step requires accurate forecasts and discrepancies can result in wasted silicon or delays in fulfilling orders (see Figure 2)
In this case, pushing the personalization processing step to the end of the manufacturing flow just prior to or, in some cases after delivery to the customer, mitigates the impact on inventory and operations (See 3).
