CryptoManager

SEAKR Selects Rambus SerDes and Security IP for Aerospace and Satellite Communications

Highlights:

SEAKR chooses Rambus 28G Multi-protocol long reach (LR) SerDes PHY and CryptoManager Root of Trust for aerospace and satellite communications
Combined SerDes and Security IP portfolio offers a one-stop-shop for chip designers, making data faster and safer
Silicon-proven technologies help enable faster, more secure, mission-critical aerospace electronic systems

SUNNYVALE, CA, and CENTENNIAL, CO – October 16, 2019 – Rambus Inc. (NASDAQ: RMBS), a premier silicon IP and chip provider making data faster and safer, today announced that SEAKR® Engineering, a leading-edge provider of advanced electronics for space applications, selected the Rambus 28G Multi-protocol LR SerDes PHY and the CryptoManager Root of Trust for its next-generation ASIC and FPGA designs.

“We’re delighted that SEAKR has chosen Rambus high-speed interface and defense-grade security cores to provide their customers innovative and silicon-proven technologies,” said Sean Fan, chief operating officer at Rambus. “Leading-edge IP solutions are mission critical to addressing the system design challenges for aerospace and satellite communications. Rambus best-in-class power, performance and area (PPA), including versatile and multi-protocol SerDes solutions and silicon-proven architecture were key differentiators in SEAKR’s decision.”

Today’s aerospace hardware contains highly-complex microelectronics that include advanced processing, data storage, and data communications capabilities. It is important to deliver both the performance needed by aerospace hardware and the means to ensure the data processed, stored and communicated remains secure. Our industry-leading interface and security IP solutions make possible faster, more secure, mission-critical electronic systems.

The Rambus portfolio of silicon IP provides a one-stop-shop for high-speed interface and security IP. The 28G Multi-protocol LR SerDes PHY is designed with a system-oriented approach, taking the interface, interconnect and channel into account to optimize performance and maximize flexibility for today’s most challenging system environments. The CryptoManager Root of Trust is a family of fully-programmable secure co-processors that provides a foundation for system security anchored in hardware and protect against a wide range of attacks with state-of-the-art anti-tamper and security techniques.

“Rambus’ ability to provide IP solutions for both moving and securing data with state-of-the-art performance was a key benefit in the selection process,” said Tony Lowry, ASIC program manager at SEAKR. “We are delighted to partner with Rambus as a valued silicon IP provider for both high-speed interfaces and embedded security, enabling SEAKR to support the advanced performance and data security needs for our aerospace customers, bringing these complex systems to market more quickly.”

For more information on Rambus SerDes PHY offerings, please visit rambus.com/serdes. Find out more details on Rambus security solutions at rambus.com/cryptomanager.

Rambus Expands Family of CryptoManager Root of Trust Secure Silicon IP Cores

Highlights:

Offers tailored configurations addressing the security needs of Internet of things (IoT), artificial intelligence (AI), machine learning (ML), cloud, government, military and automotive applications
Employs fully programmable hardware-level security co-processor with the ability to adapt to a dynamic threat environment
Purpose-built, complete security solution offers ease of integration into SoC designs
Features FIPS 140-2 ready crypto module and accelerators and DPA resistant crypto cores; designed for automotive-specific configuration ISO-26262-2018 ASIL-D

SUNNYVALE, Calif. – June 26, 2019 – Rambus Inc. (NASDAQ: RMBS) today announced the expansion of the CryptoManager Root of Trust family of products, a series of fully programmable, hardware-level secure silicon IP cores to address the security needs of applications including IoT, AI, ML, cloud, government, military and automotive. CryptoManager cores employ a siloed architecture. They isolate and secure sensitive code, processes, and algorithms from the main processor cores. This mitigates the risk of critical vulnerabilities like the Meltdown and Spectre security flaws. The CryptoManager Root of Trust is purpose-built for security — it features tailored configurations that allow chip designers to optimize main processors for high performance, while relying on the root of trust to perform security processes.

“Security is a mission critical imperative for SoC designs serving virtually every application space,” said Neeraj Paliwal, vice president of products, cryptography at Rambus. “The Rambus CryptoManager Root of Trust family offers tailored secure silicon IP solutions which chip architects can incorporate to meet the specific security needs of their designs.”

Offering a full array of security services, the CryptoManager Root of Trust enables secure boot and runtime integrity checking, remote authentication and attestation, and hardware acceleration for symmetric and asymmetric cryptographic algorithms. Featuring a layered security model, Federal Information Processing Standards (FIPS) 140-2 certified crypto accelerators, and multiple roots of trust to support independent privilege levels, the CryptoManager Root of Trust serves a wide range of applications.

The CryptoManager Root of Trust creates a foundation for Rambus’ comprehensive CryptoManager suite of solutions, including the CryptoManager Infrastructure for secure provisioning. For more information on the Rambus CryptoManager Root of Trust family of cores, visit rambus.com/security/cryptomanager-platform/root-of-trust/.

CryptoManager Root of Trust Technical Details

Within the product family, seven standard configurations address the specific security requirements and certification standards of different end markets. The RT-730 automotive design offers an ISO-26262-2018 ASIL-D-ready implementation, targeting vehicle-to-vehicle and vehicle-to-infrastructure (V2X), advanced driver-assistance systems (ADAS), and infotainment uses. For cloud, AI and ML accelerator chips, the RT-630 helps secure valuable training models, and training and inference data. For government-focused chip designs, the RT-650 offers a design that targets FIPS 140-2 Cryptographic Module Validation Program (CMVP) certification with Suite B accelerators. The RT-660 extends the functionality of RT-650 with the addition of Differential Power Analysis resistant cryptographic cores.

The CryptoManager Root of Trust family of products offers an end-to-end security implementation, comprised of a fully synthesizable IP core that anchors trust in silicon. It includes state-of-the-art crypto accelerators, security firewalls, an entropy source, secure key generation and derivation, secure one-time programmable (OTP) memory management, and a complete secure embedded firmware stack. The secure firmware stack offers secure boot for the root of trust as well as the SoC CPU(s), communicating securely with the SoC stack and running signed secure applications on the root of trust’s CPU. A reference SDK allows integrators to build secure boot, secure firmware updates and secure applications, with provided examples and references. Available evaluation boards and QEMU allow chip designers to easily evaluate the CryptoManager Root of Trust and secure applications.