Get to know your Silicon Valley Chapter President: Jerome Nadel. Jerome is the Chief Marketing Officer at Rambus and has been a CMO Club Member since July 2014. He is active in Chapter Dinners, CMO Club Summits, led CMO roundtable discussions and was a 2016 CMO Awards Finalist. You can connect with Jerome here on Twitter and LinkedIn.
News
SiFive’s Chief Executive on Opening a Chip Design Factory
Before he agreed to anything, Naveed Sherwani needed to make 40 phone calls. He had questions about the new RISC-V computer architecture and the company founded by its inventors, SiFive. He had been asked to run it.
Rambus and Northwest Logic Certify Interoperability of HBM2 Interface Solution for High-performance Networking and Data Center Applications
Integrated HBM2 PHY and Memory Controller provide validated, standards-compliant memory subsystem with superior signal integrity and reliability
SUNNYVALE, Calif. – Aug. 28, 2017 – Rambus Inc. (NASDAQ: RMBS), an innovator in semiconductor and IP products, today announced validated interoperability between its HBM2 PHY and Northwest Logics’ HBM2 Memory Controller Core. The solution builds on the growing ecosystem of Rambus partner products that interoperate with its latest HBM2 PHY IP core. The combined HBM2 solution is designed to support high-performance networking and server applications in the data center and communications markets that require the maximum amount of bandwidth available through HBM2.
“Our work with Northwest Logic gives Rambus the functionality to provide a verified solution that reduces the engineering workload and time to market for chip designers” said Luc Seraphin, senior vice president and general manager of the Rambus Memory and Interfaces Division. “As Rambus extends its footprint in PHY support for leading-edge technologies, collaborative interoperability is essential for our end customers that demand early adoption. Memory interfaces are increasingly important in today’s new workloads, and the combination of Rambus HBM2 and Northwest Logic’ HBM2 Memory Controller core is a natural fit to support customer demands on both sides.”
The Northwest Logic HBM2 Memory Controller Cores are optimized for use in both ASICs and FPGAs, and support full-rate, half-rate and quarter-rate operations. The cores provide a solution that can be configured to exact customer requirements, are silicon-proven and are verified with the Rambus HBM2 PHY.
“Our HBM2 Memory Controller Core has been successfully deployed in a wide variety of customer systems demonstrating high reliability and performance,” said Brian Daellenbach, president of Northwest Logic. “We are excited to offer a complete HBM2 solution with Rambus ensuring our customers achieve the best possible combined memory solution for their high data demands.”
The Rambus HBM2 PHY and Northwest Logic HBM2 Memory Controller are each fully JEDEC compliant to the HBM2 standard, allowing the PHY and memory controller to interoperate. The Rambus HBM2 PHY is a high-performance memory IP core that features reduced power consumption and a small form factor. It combines 2.5D packaging with a wider interface at a lower clock speed, delivering higher efficiency and lower power consumption compared to other memory solutions on the market. For additional information on Rambus HBM2 PHY solutions, please visit https://www.rambus.com/memory-and-interfaces/ddrn-phys/hbm/
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Company website: rambus.com
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Twitter: @rambusinc
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About Rambus Memory and Interfaces Division
The Rambus Memory and Interfaces Division develops products and services that solve the power, performance, and capacity challenges of the communications and data center computing markets. Rambus enhanced standards-compatible and custom memory and serial link solutions include chips, architectures, memory and SerDes interfaces, IP validation tools, and system and IC design services. Developed through our system-aware design methodology, Rambus products deliver improved time-to-market and first-time-right quality.
About Rambus Inc.
Rambus creates innovative hardware and software technologies, driving advancements from the data center to the mobile edge. Our chips, customizable IP cores, architecture licenses, tools, software, services, training and innovations improve the competitive advantage of our customers. We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs. Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile payments, and smart ticketing. At Rambus, we are makers of better. For more information, visit rambus.com.
Press Contact:
Leslie Clavin
SHIFT Communications
(415) 591-8440
Sonics And Northwest Logic Partner On High Throughput Memory Subsytem Solutions
Focus on SOC Designs for Machine Learning, Computer Vision, UHD Video Processing, and Enterprise SSD Applications
San Jose, Calif. – May 9, 2017 – Sonics, Inc., the world’s foremost supplier of Network On-Chip (NoC) and power management technologies and services and Northwest Logic, a leading provider of high performance IP cores, today announced their partnership to deliver high throughput memory subsystem solutions for complex System-On-Chip (SOC) designs. The companies’ partnership, which is being driven by a mutual customer SOC design win, integrates Sonics’ flagship interconnect fabric, SonicsGN® NoC, and Sonics’ MemMax® memory scheduler with Northwest Logic’s family of HBM2, DDRx, LPDDRx memory controllers.
“As DRAM data rates increase, the number of pipelined outstanding transactions required to achieve full throughput grows dramatically,” said Drew Wingard, CTO of Sonics. “This requires more intelligent transaction scheduling that considers both the bandwidth and latency requirements of pending requests and the page and bank states of DRAM. Without careful coordination between the NoC, memory scheduler, and memory controller, the subsystem will miss data transfer deadlines and suffer performance degradation at several points along the memory subsystem transaction path. Our partnership with Northwest Logic ensures that MemMax’s scheduling decisions produce a transaction stream enabling Northwest Logic’s controllers to efficiently map into memory commands that fully leverage the customer’s chosen DRAM technology.”
“Northwest Logic and Sonics share an uncompromising commitment to customer success,” said Brian Daellenbach, President of Northwest Logic. “We are seeing a significant uptick in demand for high throughput memory subsystems that address data-intensive applications and markets such as Machine Learning, Computer Vision, UHD Video Processing, and Enterprise SSD. Our memory controllers have a strong industry reputation for delivering high-performance, high quality, and ease-of-use. Our partnership with Sonics enables us to provide our mutual customers with a complete memory subsystem solution that also takes into account the need for high performance NoCs that support multi-channel memory subsystem architectures and integrate all of the cores in the system.”
The Sonics-Northwest Logic high throughput memory subsystem solutions are currently in use with leading SOC design customers and available immediately. For more information, contact your Sonics or Northwest Logic representative.
About Northwest Logic
Northwest Logic, founded in 1995 and located in Beaverton, Oregon, provides high-performance, silicon-proven, easy-to-use IP cores including high-performance PCI Express Solution (PCI Express 4.0/3.0/2.1/1.1 cores, DMA cores and drivers), Memory Interface Solution (HBM2, DDR4/3, LPDDR4/3, MRAM, RLDRAM 3), and MIPI Solution (CSI-2, DSI-2, DSI). These solutions support a full range of platforms including ASICs, Structured ASICs and FPGAs. For additional information, visit www.nwlogic.com.
About Sonics, Inc.
Sonics, Inc. (San Jose, Calif.) is the trusted leader in on-chip network (NoC) and power-management technologies used by the world’s top semiconductor and electronics product companies, including Broadcom®, Intel®, Marvell®, MediaTek, and Microchip®. Sonics was the first company to develop and commercialize NoCs, accelerating volume production of complex systems-on-chip (SoC) that contain multiple processor cores. Based on the ICE-Grain™ Power Architecture, Sonics’ ICE-G1™ is the industry’s first complete Energy Processing Unit (EPU), which enables rapid development of SoC power management subsystems. Sonics is also a catalyst for ongoing discussions about design methodology change via the Agile IC Methodology LinkedIn group. Sonics holds approximately 150 patent properties supporting customer products that have shipped more than four billion SoCs. For more information, visit sonicsinc.com, and follow us on Twitter (@sonicsinc) and LinkedIn.
| Contacts: | ||
| Scott Seiden Sonics, Inc 760.271.1148 [email protected] |
Steve Holte Northwest Logic 503-533-5800 [email protected] |
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Our planes are now ‘big flying mobile devices’ and top hacking targets
A rapid increase in the power and scale of cyberattacks has affected industries worldwide and the aviation sector is no exception.
We’ve begun to skim the top of what a successful cyberattack against a player in the aviation industry can achieve. In 2015, for example, LOT was forced to cancel 10 flights and delay over a dozen after a successful cyberattack was launched against the Polish airline’s ground systems.
We’ve also seen passport control systems disrupted at Istanbul’s Ataturk and Sabiha Gokcen airports and earlier this year, cyberattackers were able to hijack flight information screens and sound systems inside Vietnam’s Noi Bai and Tan Son Nhat airports to display their own political messages.
Nvidia Licenses Rambus DPA Countermeasures To Secure Critical GPUs
Rambus designed the countermeasures to protect Nvidia’s GPUs from side-channel attacks that steal encryption keys by measuring a device’s power consumption. Attacks like this can be used to break into protected systems, assist law enforcement…
