XCG supports high-volume production infrastructure for XDR memory solutions
Los Altos, California, United States – 08/07/2006
Rambus Inc. (Nasdaq:RMBS), one of the world’s premier technology licensing companies specializing in high-speed chip interfaces, today announced the latest version of its XDR™ Clock Generator (XCG), revision 1.0, a clocking solution that provides the necessary clock signals to support XDR memory systems. The XCG provides clocks that meet the specifications for the XDR DRAM device, today’s fastest high-speed memory IC offering 6.4 GB/sec of peak bandwidth on a single, 2-byte wide 3.2 GHz component.
The XCG is an off-the-shelf clock generator solution provided by several leading IC companies for a broad range of high performance clocking interface applications. The XCG revision 1.0 is based on the collaborative work between Rambus and XCG suppliers. Extensive in-system testing and demanding qualification efforts have led to the refinement of the XCG specification and resulted in a clock generator that is ready to support mass production of high frequency XDR systems for graphics processing, consumer electronics, and computing applications.
The XDR Clock Generator supports the complete XDR memory subsystem as well as the industry’s fastest processor bus interface, the 400 MHz to 8.0 GHz Rambus FlexIO™, by using a reference clock input with or without spread spectrum modulation. Major XCG components include a phase lock loop, a bypass multiplexer and four differential output buffers.
“The latest version of the Rambus XDR Clock Generator represents a state-of-the-art clocking solution that meets the high performance, high bandwidth requirements of today’s most demanding applications such as graphics processing and consumer electronics,” said David Nguyen, vice president of engineering at Rambus Inc. “As a vital component of XDR DRAM technology, XCG supports a total memory system solution that achieves an order of magnitude higher performance than today’s standard memories.”
Contained in a 28-pin TSSOP package that includes four differential clock outputs, the XCG features:
- 300-800 MHz clock source for XDR memory subsystems and FlexIO processor bus interface
- Quad (open drain) differential output drivers
- Spread spectrum reference clock input to minimize EMI (Electromagnetic Interference)
- Differential or single-ended reference clock input: 100 / 133 MHz
- SMBus features: programmable frequency multiplier, select any one to four outputs and mode of operation
- Support for frequency multipliers: 3, 4, 5, 6, 8, 9/2, 15/2 and 15/4.
- Support for systems not requiring synchronization of the XDR clock to another system clock
- Supply Voltage: VDD = 2.5V ± 0.125V
The XCG for use in systems that incorporate Rambus’ XDR memory solutions is available from the following leading manufacturers: Cypress Semiconductor Corporation, IDT (Integrated Device Technology, Inc.), and Texas Instruments Incorporated. For more information on the complete XDR memory solution including the XCG, the XDR I/O (XIO) controller interface cell to XDR-based DRAM memory and the XDR memory controller (XMC), please visit www.rambus.com.
Rambus and the Rambus logo are registered trademarks of Rambus Inc. XDR and FlexIO are trademarks of Rambus Inc. All other trade names are the service marks, trademarks, or registered trademarks of their respective owners.