LOS ALTOS, CALIFORNIA, UNITED STATES – 07/16/2007
Who: | Rambus Inc. (Nasdaq: RMBS) | |
Where: | Denali MemCon 2007 Booth # 17 Hyatt Regency Santa Clara Santa Clara, CA, USA |
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When: | July 17-19, 2007 |
Join Rambus at Denali MemCon 2007 to learn more about the advanced XDR™ memory architecture and the benefits of high-speed interface solutions. Rambus demos, displays, and presentations include:
Rambus Demos and Displays
- XDR memory architecture, a differential memory system solution with performance ranging from 3.2 to 8.0GHz. Technology demonstration running at 3.2GHz with FlexPhase™ circuit technology and Octal Data Rate (ODR) operation.
- DDR technology performing memory transactions to and from a DDR2 device operating at 800Mbps (400MHz clock).
- Rambus PCI Express® Gen2 solution with transfer rates up to 5Gbps. Silicon-proven technology demonstration includes eye diagram of physical layer transfers.
- PLAYSTATION®3 (PS3™) open demo board, featuring the XDR memory architecture. The Rambus XDR memory interface and FlexIO™ processor bus on the Cell Broadband Engine™ enable an unprecedented aggregate bandwidth of over 65GB/s in the PS3.
- TI DLP® projector open demo board, featuring the XDR memory architecture. This architecture, including XDR DRAM , XDR memory controller (XMC), XDR IO cell (XIO), and XDR clock generator (XCG), delivers memory bandwidth up to 8.0 GB/s in the latest generation of HD front projectors.
Rambus Presentation
Wednesday, July 18, 2007
Track: Next Generation Consumer Electronics
Time: 2:30pm – 3:00pm
Title: Addressing Memory Needs of Next Generation Digital TVs and Set-Top Boxes
Presenter: Anil Reddy, Sr. Marketing Manager, Rambus Inc.
For registration and additional information, please visit http://www.denali.com/memcon.
About Denali MemCon
MemCon is the largest worldwide conference and exhibition addressing the business, technology, and system design strategies for semiconductor memory and storage. The worlds leading memory vendors leverage MemCon as their key platform to provide roadmaps for new memory products, technology, and applications. System developers address key memory sub-system design challenges, and offer strategies for achieving optimal performance in end-product designs.