First silicon-based demonstration of it Ultra-Fast Power-On Technology
SANTA CLARA, CALIFORNIA, UNITED STATES – 01/31/2012
|Who:||Rambus Inc. (NASDAQ: RMBS)|
Santa Clara Convention Center – Booth #301
Santa Clara, CA
|When:||January 30 – February 2, 2012|
Rambus will showcase innovations of its Ultra-Fast Power-On Technology, its Terabyte Bandwidth Initiative, DDR3 Memory Interface, and Cryptography Research at DesignCon 2012, booth #301, at the Santa Clara Convention Center in Santa Clara, CA.
Engineers from Rambus will also be presenting 10 technical papers on topics including signal integrity, high-speed memory design, semiconductor security and more (see Rambus to Present 10 Papers at DesignCon 2012).
Ultra-Fast Power-on Technology
This silicon-based demonstration showcases Rambus’ ultra-fast power-on, low-power clocking technology that can enable a whole new class of memory devices. Implemented in a 40nm low-power CMOS process, this technology is capable of transitioning from a zero-power idle state to a 5+ Gb/s data transfer rate in 5 nanoseconds (ns) while achieving active power of only 2.4mW/Gb/s. A feed-forward architecture is used to achieve extremely fast turn-on and turn-off, simplifying the system design and significantly reducing the overall system power requirements.
DDR3 Memory Interface Solution
This high-performance, low-cost DDR3 memory controller interface solution is tailored for consumer electronics. The solution demonstrates operation in working silicon at a data rate of 1866 megatransfers per second (MT/s) in a low-cost wire bond package.
Mobile Device Side Channel Attack
All forms of electronic devices with secret keys are susceptible to side channel attacks, which are low-cost, non-invasive methods for adversaries to extract secret keys of a cryptosystem. Cryptography Research, a division of Rambus, developed DPA countermeasures to protect tamper-resistant devices such as mobile phones and game consoles against all forms of side channel attacks. This demonstration uses basic electromagnetic equipment to perform side channel attacks to extract the security key from two mobile devices.
Terabyte Bandwidth Initiative
The latest technology advancements of Rambus’ Terabyte Bandwidth Initiative enable unmatched power efficiency and compatibility to single-ended memory architectures, including GDDR5 and DDR3. With the addition of FlexMode™ interface technology, a multi-modal, SoC memory interface PHY, supporting both differential and single-ended signaling, can be implemented in a single SoC package design with no additional pins. This demo will showcase how Rambus’ Terabyte Bandwidth Initiative has achieved a power efficiency of 6 milliwatts per gigabit per second (mW/Gbps) when operating at 20Gbps in a 40nm-process silicon test vehicle.
About Rambus Inc.
Rambus is one of the world’s premier technology licensing companies. Founded in 1990, the Company specializes in the invention and design of architectures focused on enriching the end-user experience of electronic systems. Rambus’ patented innovations and breakthrough technologies help industry-leading companies bring superior products to market. Rambus licenses both its world-class patent portfolio, as well as its family of leadership and industry-standard solutions. Headquartered in Sunnyvale, California, Rambus has regional offices in North Carolina, Ohio, India, Germany, Japan, Korea, and Taiwan. Additional information is available at www.rambus.com.