At Rambus, we create cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.
Found 298 Results
SK hynix, Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems Announce “Start your HBM/2.5D Design Today” Seminar
https://www.rambus.com/hbm-complete-supply-chain-solution/San Jose, California — February 4, 2016 – SK hynix, (“SK hynix”), Amkor Technology, eSilicon, Northwest Logic and Avery Design Systems have joined forces to offer a complete High Bandwidth Memory (HBM) supply chain solution. HBM is a JEDEC-defined standard that utilizes 2.5D technology to […]
Optimizing memory for next-gen computing
https://www.rambus.com/blogs/mid-optimizing-memory-for-next-gen-computing/Semiconductor Engineering Editor in Chief Ed Sperling recently noted that getting data in and out of memory is just as important as optimizing the speed and efficiency of a processor. “[Nevertheless], for years design teams managed to skirt the issue because it was quicker, easier and less expensive to boost processor clock frequencies with a […]
Controllers Newsletter – Q4 2015
https://www.rambus.com/controllers-newsletter-q4-2015/Northwest Logic Celebrates its 20th Anniversary Northwest Logic was started in November of 1995 in the garage of one of the founding partners with an initial focus on providing FPGA-based design services. Over the years, we have grown into a provider of high-performance, high-quality IP Cores with a world-wide set of industry-leading customers. We want […]
Eliminating system bottlenecks with smart data acceleration
https://www.rambus.com/blogs/mid-eliminating-system-bottlenecks-with-smart-data-acceleration/To many in the industry, system memory is viewed as little more than a silicon holding pen for temporarily storing program commands and data during execution. Nevertheless, the dramatic growth of Big Data – driven by the burgeoning Internet of Things (IoT) – has prompted a number of key industry players to re-examine the traditional […]
A closer look at Rambus’ SDA research platform
https://www.rambus.com/blogs/a-closer-look-at-rambus-sda-research-platform-2/Rambus’ Smart Data Acceleration (SDA) research platform focuses on architectures designed to offload computing closer to very large data sets at multiple points in the memory and storage hierarchy. Potential use case scenarios include real-time risk analytics, ad serving, neural imaging, transcoding and genome mapping. Image Credit: Patrick Moorhead, Moor Insights and Strategy Comprising software, […]
Rambus partners with Los Alamos National Laboratory on smart data acceleration
https://www.rambus.com/blogs/rambus-partners-with-los-alamos-national-laboratory-on-smart-data-acceleration-2/The Los Alamos National Laboratory (LANL) is currently evaluating various aspects of Rambus’ Smart Data Acceleration (SDA) Research Program. Deployed at LANL, the SDA platform is designed to optimize the performance of in-memory databases, graph analytics and other Big Data applications. “With the advent of new tiers of the memory hierarchy coupled with high-speed modern […]
Rambus Advances its Smart Data Acceleration Research Program by Partnering with Los Alamos National Laboratory
https://www.rambus.com/rambus-advances-its-smart-data-acceleration-research-program-by-partnering-with-los-alamos-national-laboratory/SUNNYVALE, Calif. – November 17, 2015 – Rambus Inc. (NASDAQ: RMBS) today announced that it has partnered with Los Alamos National Laboratory (LANL) for evaluating elements of its Smart Data Acceleration (SDA) Research Program. The SDA platform has been deployed at LANL to improve the performance of in-memory databases, graph analytics and other Big Data […]
Northwest Logic Uses Avery Design System’s High Bandwidth Memory (HBM) Model to Verify Its High-Performance HBM Controller IP Core
https://www.rambus.com/northwest-logic-uses-avery-design-systems-high-bandwidth-memory-hbm-model-verify-high-performance-hbm-controller-ip-core/TEWKSBURY, MA, November 10, 2015 – Northwest Logic Inc, a leader in high-performance digital IP Cores and Avery Design Systems, a leader in Verification IP (VIP) solutions, today announced that Northwest’s High Bandwidth Memory (HBM) Controller Core has been verified utilizing Avery’s HBM memory model. In addition, Northwest Logic is using Avery DIMM and component memory […]
Cryptographically securing on-chip firewalling
https://www.rambus.com/blogs/security-cryptographically-securing-on-chip-firewalling/Rambus security researchers recently presented a paper at NSS 2015 that details the process of cryptographically securing on-chip firewalling. Authored by Jean-Michel Cioranesco, Craig Hampel, Guilherme Ozari de Almeida, and Rodrigo Portella do Canto, the paper describes how complex SoCs continue to influence the evolution of on-chip interconnects as points of integration for a variety […]
Rambus and Riverside Research to co-host security workshop
https://www.rambus.com/blogs/security-rambus-and-riverside-research-to-co-host-security-workshop/Rambus’ Cryptography Research division and Riverside Research will be co-hosting a two-day workshop on identifying and preventing advanced security threats. The workshop – scheduled for November 18-19, 2015 – is targeted at hardware and software security developers with a focus on defense and government industries. More specifically, technologists designing and testing tamper resistant systems for […]
